In this work, we present a prototype of the Monolithic Active Pixel Sensor (MAPS) called X-CHIP-02 designed in 180 nm SOI CMOS technology. The selected technology has attractive features for fabrication of X-ray imaging sensors: 100 Ω⋅ cm handle wafer resistivity, thick epitaxial layer to suppress back-gate effect, support of high voltage devices and deep trench isolation. X-CHIP-02 has two pixel matrices with the pixel pitch of 50 μm and 100 μm with integrated 8-bit photon counting circuitry. Fine pitch SOI monolithic pixels imply small capacitance and thus small electronic noise of ≈50 e−. Design of the sensor chip and basic radiation imaging capabilities are described in this paper.
We present the SpacePix-D, a battery-operated standalone pixel detector with built-in LCD for real-time visualization of particle hits and Bluetooth for wireless access. The SpacePix-D allows the possibility of local and remote operation and it serves as a demonstrator for the new 180 nm SoI monolithic 64 × 64 pixel detection ASICs with hit counting and deposited energy measurement capability. Currently, it operates with the X-chip03 detection ASIC which can be upgraded to a new class of SpacePix pixel detectors. The SpacePix ASIC has been submitted for manufacturing and it was designed for charged particle sensing in the space environment. It features a logarithmic front-end amplifier response to cover a large required dynamic range for heavy ion detection and SEU-hardened digital circuits.
This work discusses the design and the main results relevant to the characterization of analog front-end processors in view of their operation in the pixel detector readout chips of ATLAS and CMS at the High-Luminosity LHC. The front-end channels presented in this paper are part of RD53A, a large scale demonstrator designed in a 65 nm CMOS technology by the RD53 collaboration. The collaboration is now developing the full-sized readout chips for the actual experiments. Some details on the improvements implemented in the analog front-ends are provided in the paper.
The presented study compares the effects of ionizing radiation on circuit structures manufactured in a 180 nm bulk CMOS and 180 nm SoI CMOS technology. A high-flux 60 Co medical radiation source with a dose rate of 460 Gy•min −1 was used. The specimens under irradiation were placed in a Pb/Al enclosure providing an approximate electron equilibrium. Besides the analog and digital circuits, the ASICs also contain transistor test structures for direct study of irradiation effects upon electronics. The integral characteristics of current consumption, shifts in transistor threshold voltage and leakage current increase observations have been made. The SoI technology was shown to be several orders of magnitude more sensitive to TID effects, but during irradiation, its properties had a tendency to return to normal.
K: Radiation damage to electronic components; Radiation-hard detectors; Radiation-hard electronics; Solid state detectors 1Corresponding author.
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