Phase-change random access memory (PRAM) technology is reviewed. PRAM uses the phase change between the amorphous state and the crystalline state caused by Joule heating as its memory mechanism. A change in electrical resistance owing to a phase change is detected by a small electric current. The merits of this approach are that the resistance change is more than one order of magnitude, and its simple structure decreases the number of steps in the manufacturing process. Suppression of reset current for the change from the lowresistance crystalline state to the amorphous state and an improvement in durability against set-reset cycles and high-temperature operation will ultimately be achieved.

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A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., current and voltage) for the cell is significantly reduced by inserting a very thin Ta 2 O 5 film between GeSbTe (GST) and a W plug. The Ta 2 O 5 interfacial layer works not only as a heat insulator enabling effective heat generation in GST but also as an adhesion layer between GST and SiO 2 underneath. Nonetheless, sufficient current flows through the interfacial layer due to direct tunneling. A low programming power of 1.5 V/100 µA can therefore be obtained even on a W plug with a diameter of 180 nm fabricated using standard 0.13-µm CMOS technology. In addition, the uniformity and repeatability of cell resistance are excellent because of the inherently stable Ta 2 O 5 film properties.

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The superlattice film with the periodical thin film layers of Sb2Te3/GeTe used as a phase change memory was studied for deposition in the crystal phase. We successfully fabricated the superlattice structure with the sputtering temperature of 200 °C. Moreover, the pillar structure with the size of 70 nm was dry-etched using a HBr/Ar gas mixture.