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Cu metallization is not only used in low power logic circuit but also in high power automotive application because of its low resistance and robustness in repetitive clamping. How to characterize the stress in Cu metallization is a crucial issue in BEOL integration scheme. In this paper we design a circuit with bandgap reference voltage and overVoltage capability which are able characterize the correlation of Cu stress and in line wafer bow through electrical measurement 1.

Negative Bias Temperature Instability (NBTI) is one of the major issues related to p-channel metal-oxide semiconductor (PMOS) reliability that has been discussed for more than 40 years. In this paper, we discussed the effect of fluorine (F) co-implant to the NBTI improvement, capacitance and silicon oxide (Si02) thickness in term of F concentration, implant energy and also implant sequence at p+-region. Results suggest that, besides F dose and implant energy that is known to contribute to NBTI behaviors; implant sequence also plays a role in NBTI degradation.

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