In this article we map out the thickness dependence of the resistivity of individual graphene strips, from single layer graphene through to the formation of graphitic structures. We report exceptionally low resistivity values for single strips and demonstrate that the resistivity distribution for single strips is anomalously narrow when compared to bi- and trilayer graphene, consistent with the unique electronic properties of single graphene layers. In agreement with theoretical predictions, we show that the transition to bulklike resistivities occurs at seven to eight layers of graphene. Moreover, we demonstrate that the contact resistance between graphene flakes in a graphene network scales with the flake thickness and the implications for transparent conductor applications are discussed.
Extending the resolution and spatial proximity of lithographic patterning below critical dimensions of 20 nm remains a key challenge with very-large-scale integration, especially if the persistent scaling of silicon electronic devices is sustained. One approach, which relies upon the directed self-assembly of block copolymers by chemical-epitaxy, is capable of achieving high density 1 : 1 patterning with critical dimensions approaching 5 nm. Herein, we outline an integration-favourable strategy for fabricating high areal density arrays of aligned silicon nanowires by directed self-assembly of a PS-b-PMMA block copolymer nanopatterns with a L(0) (pitch) of 42 nm, on chemically pre-patterned surfaces. Parallel arrays (5 × 10(6) wires per cm) of uni-directional and isolated silicon nanowires on insulator substrates with critical dimension ranging from 15 to 19 nm were fabricated by using precision plasma etch processes; with each stage monitored by electron microscopy. This step-by-step approach provides detailed information on interfacial oxide formation at the device silicon layer, the polystyrene profile during plasma etching, final critical dimension uniformity and line edge roughness variation nanowire during processing. The resulting silicon-nanowire array devices exhibit Schottky-type behaviour and a clear field-effect. The measured values for resistivity and specific contact resistance were ((2.6 ± 1.2) × 10(5)Ωcm) and ((240 ± 80) Ωcm(2)) respectively. These values are typical for intrinsic (un-doped) silicon when contacted by high work function metal albeit counterintuitive as the resistivity of the starting wafer (∼10 Ωcm) is 4 orders of magnitude lower. In essence, the nanowires are so small and consist of so few atoms, that statistically, at the original doping level each nanowire contains less than a single dopant atom and consequently exhibits the electrical behaviour of the un-doped host material. Moreover this indicates that the processing successfully avoided unintentional doping. Therefore our approach permits tuning of the device steps to contact the nanowires functionality through careful selection of the initial bulk starting material and/or by means of post processing steps e.g. thermal annealing of metal contacts to produce high performance devices. We envision that such a controllable process, combined with the precision patterning of the aligned block copolymer nanopatterns, could prolong the scaling of nanoelectronics and potentially enable the fabrication of dense, parallel arrays of multi-gate field effect transistors.
Ultrathin conductive carbon layers (UCCLs) were created by spin coating resists and subsequently converting them to conductive films by pyrolysis. Homogeneous layers as thin as 3nm with nearly atomically smooth surfaces could be obtained. Layer characterization was carried out with the help of atomic force microscopy, profilometry, four-point probe measurements, Raman spectroscopy and ultraviolet-visible spectroscopy. The Raman spectra and high-resolution transmission electron microscopy image indicated that a glassy carbon like material was obtained after pyrolysis. The electrical properties of the UCCL could be controlled over a wide range by varying the pyrolysis temperature. Variation in transmittance with conductivity was investigated for applications as transparent conducting films. It was observed that the layers are continuous down to a thickness below 10 nm, with conductivities of 1.6 x 10 4 S/m, matching the best values observed for pyrolysed carbon films. Further, the chemical stability of the films and their utilization as transparent electrochemical electrodes has been investigated using cyclic voltammetry and electrochemical impedance spectroscopy.
A gas phase controlled graphene synthesis resembling a CVD process that does not critically depend on cooling rates is reported. The controllable catalytic CVD permits high quality large-area graphene formation with deft control over the thickness from monolayers to thick graphitic structures at temperatures as low as 750 1C.Graphene has attracted enormous attention because of its exciting structural and electrical properties. 1 Extremely high mobilities 2 and a tunable band gap 3 make graphene potentially useful for innovative approaches to electronics 4 and sensing. 5 For these applications a scalable and reproducible method for graphene production is required. Mechanical exfoliation of graphite 6 and decomposition 7 of SiC surfaces upon thermal treatment have been the main sources for graphene, with limitations in quality and scalability. Solution-phase 8 and solvothermal syntheses of graphene 9 were a major improvement for processing, however for device fabrication, a reproducible method such as CVD yielding high quality films of controlled thickness is desirable. Recently, the formation of graphene under CVD-like conditions on Ir, 10a Ru, 10b Ni 11 and Cu 12 surfaces has been reported. Nevertheless, these processes are not conventional CVD since they rely on precipitation of carbon upon cooling and require high-quality substrates, elevated temperatures (B1000 1C) and accurate control over cooling rates.Here, we introduce a CVD process which produces high quality graphene with tunable thickness on Ni surfaces. We have synthesised large-area graphene films (41 cm 2 ) in a simple tubular CVD reactor using ethyne (acetylene) as precursor under varying CVD parameters. The nickel substrates were prepared by E-beam evaporation (Edwards Auto500) of Ni (200 nm) on thermally-grown silicon dioxide (300 nm). The substrates were introduced in a tube furnace heated to temperatures between 650 1C and 1000 1C. After reduction by a mixture of hydrogen and argon (1 : 1) for 5 min, Ar was shut off and acetylene was introduced, keeping the overall pressure between 0.5 and 5 Torr for various dwell times. The flow rate was nominally 60 sccm for acetylene and 180 sccm for hydrogen or argon, unless otherwise specified. The substrates were then cooled under nitrogen flow with rates exceeding 15 1C s À1 or as slow as 0.15 1C s À1 . For reference, bare SiO 2 substrates were also placed in the CVD chamber. A Zeiss Ultra FE SEM with an EDX detector was used for imaging the graphene layers directly on the substrates. Aberration-corrected HRTEM was carried out using an Oxford-JEOL JEM2200MCO FEGTEM/STEM fitted with two CEOS C s aberration correctors, operated at 80 kV. The samples for HRTEM were prepared by directly peeling off the carbon deposit from the substrate with a formvar film which then was deposited onto a TEM grid. Raman spectra were taken with a Jobin-Yvon Labram Raman spectrometer using an excitation wavelength of 633 nm, with a probe size of 2 mm. Typically, five Raman spectra were taken on each sample to confirm homogeneit...
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