No abstract

Most previous low-power personal computer designs have been either focused on power efficiency improvement or on software power management in the working states. This research aims to reduce the total standby power amount in the off state. The authors accomplish the goal of reducing the power consumption by a wake-up device which is replaced by a chip with a still lower consumption. The authors redesign the power circuit and cut off the power supply for the unnecessary chips, with the exception of the power needed for the specific chip used to wake up the system. The authors also turn off the power supply of the original power controller chip which is used to control the system's power status. In addition, the authors use another low-power chip instead of the original one and redesign the power sequence of the system in order to maintain the system's power state while the system's power status controller is turned off. Finally, as the authors use this low-power chip to manage the standby power source separately by means of the remote wake-up devices, the authors reduce further the standby power consumption to 4.4 mW in the power-off state by use of the various wake-up methods. The total result is an improvement of approximately 99.3%.

Most of the research into saving energy which tries to improve the power efficiency and manage the power systems uses software control, but in our design we modify the S3 state to Deep S3 state in order to save power consumption by means of the Suspend to RAM mode. We redesign the circuit to save power in the PC standby mode. First, we recheck the whole circuit in the standby mode and to clarify the chip which is used to wake up the system and to turn off any unnecessary chip power in the standby mode. Secondly, we redesign the power sequence and use an additional chip to control the system power that allows a normal system operation to turn off the power of the unnecessary control chips. Third, we simplify the multiple remote wake-up mechanism to control the power of the remote boot device, which saves the power of the standby mode. The improvement shows that our design consumes less than 0.23W in Deep S3 state and 0.42W with multiple remote wake-up functions.

No abstract

Most low-power PC design research focuses on the power consumption of devices in the system, in order to reduce the consumption of the peripheral components while the system is in the idle state. In this design, the power conversion efficiency of the multi-phase pulse width modulation power regulator can be improved by using the auto-phase switching control scheme. The external load-sensing circuit is used to both monitor the output current and to change the regulator to a different operation method automatically. This design is dependent on the different loading to set the optimised operation phase. The power conversion efficiency can be maintained from 88.19 to 93.41%, when the load current is changed from 1.06 to 119 A.