The paper objective is to determine the basic schemes and their characteristics for ensuring the security of Internet of Things nodes using symmetric authentication cryptographic microcircuits. The main results that had been obtained by using method of structural and functional design represent potentially possible options for using symmetric authentication cryptomicrocircuits to ensure the protection of Internet of Things nodes. The analysis of the presented schemes’ functioning made it possible to form the following conclusions. The host-side private key storage authentication scheme provides a fast symmetric authentication process, but requires secure storage of the private key on the host side. The simplest authentication scheme without storing a secret key on the host side, which does not imply the use of a cryptographic chip on the host side, provides a fast symmetric authentication process, but has a relatively low cryptographic strength, since the interaction in the system is performed without a random component in cryptographic transformations, which assumes constant the nature of requests in the system, and, consequently, the possibility of cryptanalysis of messages. To increase the cryptographic strength of such a scheme, it is advisable to introduce into the interaction system a random component in cryptographic transformations and use additional hashing procedures with an intermediate key, which leads to the complication of the scheme due to double hashing, but significantly increases the level of information security of IoT nodes. Downloading software in the system is implemented using secret encryption and authentication keys, which are permanently stored in the secure non-volatile memory of cryptographic chips of IoT nodes. In this case, session keys for encrypting the firmware code or decrypting it are generated on the client and host side, respectively. This approach allows creating unique downloads of the original firmware code (application) by preventing cryptanalysts from obtaining its images and algorithms. The peculiarity of the scheme of exchange of symmetric session encryption keys of messages are: use of a secret key stored on the side of the host and the client; the determination of the session key is performed as a result of hashing a random number with a secret key, that is, the exchange of the session key is performed in an encrypted secure form.

Subject of research: procedures of asymmetric authentication of Internet of Things nodes to ensure the highest level of security using cryptographic chips. The aim of the article is to study the ways of potential use of cryptographic chips to ensure secure authentication of Internet of Things sites using asymmetric cryptography procedures. The article solves the following tasks: analysis of hardware support technologies for asymmetric cryptography of the Internet of Things; definition of secure procedures for asymmetric authentication of Internet of Things sites and their constituent elements: creation of certificates, verification of public and private keys. Research methods: method of structural and functional analysis and design of complex systems, methods of identification and authentication of information objects, cryptographic methods of information protection, methods of security analysis of distributed information systems. The novelty of the study is the analysis of hardware support technologies for asymmetric cryptography of Internet of Things with cryptographic chips and the definition of structural and functional schemes for the implementation of procedures for asymmetric authentication of Internet of Things. Distinctive features of the provided asymmetric authentication schemes and procedures are: ensuring an increased level of information security through secure storage of cryptographic keys, digital signatures, certificates, confidential data in a novelty security environment protected from external attacks and no need to store private keys on the host side. The results of the work are procedures and schemes of application of cryptomicrops of asymmetric authentication to ensure the protection of Internet of Things. Analysis of the functioning of the presented schemes allowed to draw the following conclusions. The proposed structural and functional schemes for the implementation of procedures for asymmetric authentication of Internet of Things using cryptographic chips give the user an easy opportunity to implement cryptography without expertise in this field. These chips use the ECDSA digital signature computing and verification hardware with elliptical curve advantages, as a proven and reliable authentication algorithm, and the ECDH symmetric encryption session key generation unit. The provided schemes and procedures support three components of information security, namely: confidentiality, integrity and authenticity of data. Examples of potential applications of the provided schemes and procedures can be implemented using any asymmetric authentication chip, but it is recommended that they be used to generate encryption session keys and where digital signatures are required to verify data and code for integrity and authenticity.

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Stability and control derivatives of Skywalker X8 flying wing from flight-test data are estimated by using the combination of the output error and least square methods in the presence of the wind. Data is collected from closed loop flight tests with a proportional-integral-derivative (PID) controller that caused data co-linearity problems for the identification of the unmanned aerial vehicle (UAV) dynamic system. The data co-linearity problem is solved with a biased estimation via priori information, parameter fixing and constrained optimization, which uses analytical values of aerodynamic parameters, the level of the identifiability and sensitivity of the measurement vector to the parameters. Estimated aerodynamic parameters are compared with the theoretically calculated coefficients of the UAV, moreover, the dynamic model is validated with additional flight-test data and small covariances of the estimated parameters.

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