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Abstract-Testing Cyber-Physical Systems is becoming increasingly challenging as they incorporate advanced autonomy features. We investigate using an external runtime monitor as a partial test oracle to detect violations of critical system behavioral requirements on an automotive development platform. Despite limited source code access and using only existing network messages, we were able to monitor a hardware-in-theloop vehicle simulator and analyze prototype vehicle log data to detect violations of high-level critical properties. Interface robustness testing was useful to further exercise the monitors. Beyond demonstrating feasibility, the experience emphasized a number of remaining research challenges, including: approximating system intent based on limited system state observability, how to best balance the simplicity and expressiveness of the specification language used to define monitored properties, how to warm up monitoring of system variable state after mode change discontinuities, and managing the differences between simulation and real vehicles when conducting such tests.

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Standardized software architectures, such as AUTomotive Open System ARchitecture (AUTOSAR), are being pursued within the automotive industry in order to reduce the cost of developing new vehicle features. Many of these features will need to be highly dependable. Fault injection plays an im portant role during the dependability analysis of such soft ware. This work evaluates the feasibility of leveraging the CANoe simulation environment to develop software-based methods for injecting faults into AUTOSAR applications. We describe a proof-of-concept fault-injection framework with example fault-injection scenarios, as well as imple mentation issues faced and addressed, lessons learned, and the suitability of using CANoe as a fault-injection environ ment.

University research in high level synthesis has resulted in a number of prototype tools which have the potentiat to dramatically reduce the design time for digital integrated circuits and systems. So far, however, these tools have been largely untested on industrial d~igns. This paper describes an industrial project in high level synthesis in which a university tool is enhanced to make it suitable for production designs. Flexibility in data-vs..control tradeoffs, control over timing of I/O operations, and new interfaces to commercial logic synthesis and datapath compiler tools are added. The resulting system is then used to design three chips in parallel with production desigsi teams. The synthesfsed chips are found to stmtdate correctly and to have reasonable densities.