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A computationally efficient mismatched filter comprised of a matched filter in cascade with a multi-stage filter based on sidelobe inversion is proposed. For this approach to work, the autocorrelation of the given code has to satisfy certain conditions that are derived in this work. If in addition, the sidelobes are sparse and of small integer values, such as in Barker codes and Huffman sequences, then the proposed filters are shown to be computationally very efficient. When implemented in VLSI, they require significantly smaller chip area and consume less power compared to the length-optimal filters achieving comparable sidelobe suppression.

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A CMOS video sensor for High Dynamic Range (HDR) imaging is discussed. Unlike traditional memoryintensive methods for HDR imaging where frames with different exposure times are digitally combined to obtain an HDR frame, HDR imaging is accomplished in the sensor at pixel level by digitally combining sub-pixels with different exposure times to obtain an HDR pixel. In HDR mode, the prototype video sensor demonstrated a phenomenal 26dB improvement in dynamic range over normal mode.