Abstract-In this paper, the short-circuit robustness of a normally-off GaN HEMT is investigated in relation to applied bias conditions and pulse duration. The results align with previous studies on normally-on devices in highlighting an electrical type of failure. Here, however, the relevance of the specific gate-drive circuit design and corresponding device operational conditions is demonstrated. A gate-bias dependence (GBD) of the failure, correlated to the applied drain-source voltage, is introduced as a novel specific feature for the p-Gate type device.

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Short-circuit withstand capability is a key requirement for semiconductor power devices in a number of strategic application domains, including traction, renewable energies and power distribution. Indeed, though clearly a nonintentional operational mode, sort-circuit can be nonetheless a relatively frequent event. Due to its associated considerable electro-thermal stress levels, a thorough analysis of both single pulse withstand capability and device aging as a result of repetitive stress are mandatory before widespread deployment of new device technologies. In this paper, the focus is on latest generation commercial gate-injection GaN transistors, in the 600 V rating class. Extensive experimental analysis is presented, putting forward an interpretation of the underlying degradation and failure mechanisms, supported by coupled electro-thermal device models, incorporating both the functional and structural characteristics of the devices. The findings highlight a remarkable robustness of a specific type of p-gate GaN HEMTs, referred to as gate injection transistors (GITs), against shortcircuit stress, making them a potentially very attractive and competitive technology in the voltage class of relevance.

A B S T R A C TA study of electrical and thermal failure modes of 600 V p-doped GaN HEMTs is presented, which focuses on the investigation of short-circuit limitations. The electrical failure mode seems to be an electrical field breakdown in the structure which is caused by excessive carrier concentration, rather than primary thermal generated. Accordingly, a thermal failure mode is observed, which features a distinctive behaviour and seems to be similar to schottky-gate HEMTs. Concerning the electrical failure mode, a specific p-gate HEMT short-circuit safe operating area (SCSOA) is presented as a novelty. However, a short-circuit capability of up to 520 V can be achieved, regarding the design of the gate-drive circuit.