In spite of the fact, that the main purpose of CMP is the planarization of surfaces, most processes are optimized with respect to the removal rate. This might be due to a lack in techniques for the determination of the planarization behavior. The commonly used expression "Planarization Length" implies a maximum lateral extension over which the planarization is obtained and which can not be improved. Several attempts have been made to determine the planarization length by studying the CMP on different test patterns. The general problem in the interpretation of the data is the interaction of neighboring pattern with different pattern densities. This problem does not apply to the most simple pattern possible, which is a single step with an extension of the up and down areas much larger than the planarization length. In this case the spatial derivative of the resulting contour after CMP is directly the demanding transfer function to be used for the convolution. This concept, initially proposed by Boning et. al., was applied to evaluate the polish of copper and silicon oxide. Wafers with concentrically steps in Cu or SiO 2 films with an extension of 1 to 5 cm have been prepared. During polish, the initially infinite steep step widens up, yielding the planarization length as a function of the removal respective the polishing time. Significant differences in the evaluation of the planarization length could be quantified depending on the pad, slurry and tool parameters. Our first experiments revealed a decrease in planarization length by the addition of BTA in a copper slurry. We believe that the SPR method enables a unambiguous, pattern independent determination of the planarization capability in CMP.
The major aim of CMP is not the removal of excess material but the planarization of the surface. Therefore the determination of the planarization length appears to be more important than the removal rate itself. It has been shown, that the planarization length is not a constant process parameter, but is related to the removal respectively to the polish time in a square root behaviour. Founded on models proposed by Boning, Ouma, et. al. we applied a sequential polish on a single quasi infinite step. The resulting profile could be simulated by a sequential convolution of the surface contour with a Gaussian transfer function.To come closer to the situation on a chip pattern we investigated the planarization behaviour on a specific pattern of the MIT854AZ copper CMP test chip, where a large area of unpatterned surface touches a pattern with a specific constant density.The 200 mm wafer samples consisted of RIE structured oxide films covered with 850 nm ECD copper. The polish was performed on a standard semiconductor manufacturing tool, using a commercial consumables set. The surface profiles were determined by a high resolution profiler within the polishing sequence. The densely patterned areas are removed within a certain polishing time while the transition point between the unpatterned and patterned area appears as a global step. The deposited copper thickness is sufficient to study the contour evolution in both phases, before and after removal of the dense pattern. The paper presents the experimental results on the contour evolution for the patterned fields as well as the global step.
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