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In this paper, the recent advances of CDMA receiver IC design are reviewed. Architecture choices for high linearity low noise CDMA receiver are compared in terms of cost, performance and complexity. The design of tri-band (450M/CELL/PCS) SAW-less CDMA receiver in 65nm CMOS is then described. Measured receiver noise figure is less than 3 dB, X-MOD IIP3 is better than 18 dBm for 450M/CELL band, and 8 dBm for PCS band, and IIP2 is better than 60 dBm for all the three bands.

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