Heat dissipation from three-dimensional (3D) chip stacks can cause large thermal gradients due to the accumulation of dissipated heat and thermal interfaces from each integrated die. To reduce the overall thermal resistance and thereby the thermal gradients, this publication will provide an overview of several studies on the formation of sequential thermal underfills that result in percolation and quasi-areal thermal contacts between the filler particles in the composite material. The quasi-areal contacts are formed from nanoparticles self-assembled by capillary bridging, so-called necks. Thermal conductivities of up to 2.5 W/m K and 2.8 W/m K were demonstrated experimentally for the percolating and the neck-based underfills, respectively. This is a substantial improvement with respect to a state-of-the-art capillary thermal underfill (0.7 W/m K). Critical parameters in the formation of sequential thermal underfills will be discussed, such as the material choice and refinement, as well as the characteristics and limitations of the individual process steps. Guidelines are provided on dry versus wet filling of filler particles, the optimal bimodal nanosuspension formulation and matrix material feed, and the over-pressure cure to mitigate voids in the underfill during backfilling. Finally, the sequential filling process is successfully applied on microprocessor demonstrator modules, without any detectable sign of degradation after 1500 thermal cycles, as well as to a two-die chip stack. The morphology and performance of the novel underfills are further discussed, ranging from particle arrangements in the filler particle bed, to cracks formed in the necks. The thermal and mechanical performance is benchmarked with respect to the capillary thermal and mechanical underfills. Finally, the thermal improvements within a chip stack are discussed. An 8 - or 16-die chip stack can dissipate 46% and 65% more power with the optimized neck-based thermal underfill than with a state-of-the-artcapillary thermal underfill.
Internal stresses are very important for the performance of protective hard coatings. Tensile stresses favour the formation and propagation of cracks, inducing fracture and corrosion. Medium compressive stresses hinder fatigue. But high compressive stresses, typically for hard coatings produced by PVD (physical vapour deposition) processes, support delamination in order to relax the stored elastic energy. However notwithstanding its relevance, the internal stresses are only seldom used for the optimisation and quality control of hard coatings in industry. This unsatisfying situation is caused by the deficit in efficient measuring methods. The results of thin sheets, where the stresses can be simply measured by their curvature, are not necessarily representative for the coating of thicker parts. The conventional XRD (X-ray Diffraction), based on angle-dispersive evaluation needs expensive devices and is rather time consuming. The energy-dispersive technique opens new possibilities. It is based on polychromatic radiation. The interference of the lattice plane reflections corresponding to the Bragg-equation is investigated by the diffraction intensity of the different wavelength (or photon energies), not by varying the Bragg-angle as in conventional XRD. Hence, the whole diffraction pattern can be obtained in one shoot without the use of any goniometer. This allows the construction of small and compact measuring devices and the reduction of measuring time to a few minutes. The capability of the ED-XRD (Energy Dispersive X-ray Diffraction) is demonstrated for titanium nitride and chromium nitride films deposited by cathodic vacuum arc with varying parameters. Comparisons were made with the much more time-consuming AD-XRD (Angle Dispersive X-ray Diffraction) for residual stress analysis. The results of both methods are in good agreement.
Self‐assembled Swiss‐roll microstructures (SRMs) are widely explored to build up microelectronic devices such as capacitors, transistors, or inductors as well as sensors and lab‐in‐a‐tube systems. These devices often need to be transferred to a special position on a microchip or printed circuit board for the final application. Such a device transfer is typically conducted by a pick‐and‐place process exerting enormous mechanical loads onto the 3D components that may cause catastrophic failure of the device. Herein, the mechanical deformation behavior of SRMs using experiments and simulations is investigated. SRMs using in situ scanning electron microscopy (SEM) combined with nanoindentation are characterized. This allows us to mimic and characterize mechanical loads as they occur in a pick‐and‐place process. The deformation response of SRMs depends on three geometrical factors, i.e., the number of windings, compactness of consecutive windings, and inner diameter of the microtube. Nonlinear finite element analysis (FEA) showing good agreement with experiments is performed. It is believed that the insights into the mechanical loading of 3D self‐assembled architectures will lead to novel techniques suitable for a new generation of pick‐and‐place machines operating at the microscale.
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