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This paper discusses the reliability testing results of a lead-free version of the micro SMD, National Semiconductor's Wafer Level-Chip Scale Package (WL-CSP). The micro SMD, a true wafer scale package has proven to be highly adaptable in the conventional assembly process, requiring no special considerations during the surface mount assembly operation. The current micro SMD utilizes standard Sn/Pb solder bumps as the interconnect medium. Based on evaluations of the various options available for the lead-free solder, micro SMD devices bumped with Sn/Ag/Cu solder were tested during this evaluation. There are two bump sizes currently available for the micro SMD package, a 170-micron bump diameter and a 300-micron bump diameter.This paper addresses the impact of board assembly conditions, package solder type, package bump size, and thermal cycling profiles on the reliability of the lead-free WL-CSPs. This paper will address the initial evaluations on the 170-micron bumped micro SMD packages. Results of this work are used to determine viable combinations of lead-free and eutectic solder. The lead-free version of the micro SMD is in synch with the next packaging evolutionary stage toward a lead-free assembly process. 0-7803-7430-4/021$17.00 02002 ICEE

With the growing proliferation of Wafer-Level-Chip-ScalePackages (WLCSP), the target applications are increasingly focused on hand-held devices and consumer applications like cellular phones, pagers, PDA's etc. Packages in this family, like National Semiconductor's micro SMD package, have proven reliability in thermal cycling, humidity and bias testing, and are generally rated at moisture sensitivity level 1 (MSL-1). As applications continue to require more functionality in smaller packages, these package types will continue the growing trend of prevalence in the market-place.Typical handheld applications like the cellular phone applications result in several cycles of flexing during normal application. Some cellular handset manufacturers have started investigating the need to implement a 'Push Button Test' to simulate the effects of repeated deflection of the PCB immediately under the keypads. This paper describes and discusses the results of extensive flexural testing done to understand the effect of flexural testing on wafer level components mounted on a PCB. The PCB configuration used attempted to approximate the PCB configuration typically seen with cellular phone applications. Multiple locations of component placement were selected with reference to the point of maximum flexing as well as distance to the nearest rivet/bolt location. Other parameters varied included the PCB build-up structure, and the landing pad sizes on the PCB at the soldering locations.These experiments have shown a clear trend in terms of the superior solder joint strength achieved with an optimized solder joint shape, the importance of device location on the PCB to enhance life in flexural testing, and the impact of the overall size of the solder joint subjected to flexural testing. For all possible variations listed, based on a combination of the solder ball size, the correct pad size, and the location on PCB, there are positions on the PCB available which will surpass required test values. In case of limitations on some parameters, there is still a combination using the other factors that can create a solder joint strength that is able to withstand all requirements during flexural testing. IntroductionThe growth of wafer level packages has largely been driven by the requirements of portable electronics, predominated by applications like cellular phones and PDA's. These applications are human-interaction intensive; that is, a very large portion of the applications involve a manual input of a tactile manner. This introduces a variable element into the operation of these devices, since the manual input will vary in magnitude and time depending on the user.Besides the typical reliability and life-cycle tests traditionally carried out for electronic packages, which include mechanical tests like drop tests and bending tests, the additional