Recent advancement in the semiconductor technology allow the hardware engineers to integrate complex modules like processors, peripheral devices, and memory in a single System-on-a-Chip (SoC);where testability, power minimization and management, area minimization are the important system level considerations. Performances both in terms of processing speed and power consumption are becoming more and more challenging in SOC designing. Novel system on chip architectures should be able to execute multiple performances demanding applications while maintaining low power consumption, small area, nonrecurring engineering costs and short time to-market. Hence a lot of research is going on to implement CGRA in SOC because Coarse-grained reconfigurable architecture can provide both performance and flexibility. This paper gives a guided tour over a decade of development in CGRA and their significance in SOC design

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