The electronics industry has successfully transitioned from Sn/Pb to Pb free (LF) solder for computing and consumer electronics applications. However, there is no industry-wide standardized LF solder joint reliability model (neither empirical nor FEA-based) available for solder fatigue reliability assessment. A LF solder fatigue model has been proposed in this paper based on a 3-parameter modified Coffin-Manson approach. The proposed model showed best fit to the experimental data (17 pairs of temperature cycle test data) from different sources for multiple package types and sizes including various test conditions. The model fit to the experimental data was excellent and the error was less than 6%. This analysis showed that the LF acceleration factor (AF) model is not significantly different from the Sn/Pb model and proposed model provides best fit to experimental results. IntroductionWhile the electronics industry has successfully completed the transition to Pb-free (LF) technology for computing and consumer electronics applications, there is still no standardized LF solder joint reliability model (neither empirical nor FEA-based) available for solder fatigue. Numerous studies have been published regarding the thermal cycling reliability of SnAgCu solder joints under accelerated test conditions [e.g., 1-5]. The acceleration factor (AF) models for LF are of particular interests to the electronics industry for the simple reason that the solder joint reliability in field power cycling conditions can be predicted in a simple yet accurate manner. Pan et al [6] first attempted to obtain an acceleration factor model using several thermal cycle profiles, in which the temperature range, maximum temperature and the cycle time or frequency were systematically varied. However, it has been shown in several studies [7,8] that this model prediction is not well correlated with experimental results. Studies by Salmela [8], and Zhang and Clech [7] evaluated several different types of AF models. Those AF models also include models based on the compact strain energy analysis and the finite element analysis. It showed that the FEA based models have limited success in predicting the AF factors, especially when test conditions and package types vary dramatically.In this paper, a LF acceleration factor model is proposed based on the Norris-Landzberg equation. A total of 17 pairs of experimental data suitable for acceleration factor computations, taken from Intel and industry published test data, were used to calibrate and support the model. These data

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In this paper, a user behavior based solder joint reliability modeling approach has been proposed to estimate the design and test requirements for the second level interconnect (SLI) reliability prediction. This approach uses a numerical tool to integrate solder joint creep damage during the actual use condition that was collected from a large user sample size. The resultant damage per time period was then input to the solder joint fatigue model to estimate equivalent damage to testing duration. The is a physics based approach and is expected to provide more accurate product life prediction and reliability performance demand for BGA package designs. IntroductionFor most electronic packaging failure mechanisms the user behavior plays a critical role in damage / degradation of the product. Currently, design requirements are based on a count of the number of times a system switches between power states and associated temperature ranges. A user survey is commonly used to collect user behavior data. The user survey result is then being translated to simple uniform temperature cycles based on a series of criteria (eg. power ON/OFF cycles/day counts). The translation is over conservative to account for the uncertainties in the user data.The first drawback of the current approach is the uncertainty of the user behavior. For electronic components, the heat generated by the silicon die is related to the work load. Furthermore, contemporary power saving features result in reduced temperatures when the component is in a standby or idle state. The "mini cycle" effect, the temperature fluctuation during normal use when the power is ON, should be carefully characterized. Currently, a simple assumption is that many small mini cycles are equal to several power cycles.The assumption may lead to conservative or unrealistic results based on the amplitude, duration and high or low temperature ranges in which the mini-cycle occurs.A significant drawback of current approach is not considering the temperature gradient of the component during use. Solder joint damage is caused by the thermal mismatch of the different materials in the packaging, so the temperature is the driving factor of the damage. The thermal cycle test condition uses a uniform temperature field for convenience and test efficiency. However, in the use condition, the silicon die is the heat source and the temperature gradient between the die-package and board will cause differential mechanical deformation, and a different solder joint damage distribution compared with the test condition. The empirically derived Norris-Landzburg (NL) equations cannot consider the effect of temperature gradients, transients or geometric factors; however, finite element modeling (FEM) can include the effect.

With the technology trend moving towards faster, smaller, and cheaper products, the consumer electronics industry is using more and more high density fine pitch BGA components in a lead-free environment. This has created additional board-level solder joint mechanical reliability challenges. Current literature studies mostly focus on the impact of component design features on BGA solder joint reliability. Very little information is available on board design factor impact on BGA mechanical reliability. This paper highlights the results of our study on the sensitivity of three critical board assembly design factors on BGA solder joint interconnect reliability under mechanical shipping stresses. The results from this study showed high sensitivity to the component location on the board, board trace routing orientation under the component, component enabling heat sink retention mechanism design, and neighboring component heat sink mass. The data collection also showed multiple failure modes including BGA solder joint cracks, PCB pad craters, and PCB trace cracks. Finite element analysis (FEA) modeling results correlated well with empirical data collection and provided additional insight into the physics behind the failures. In conclusion, the paper provides design for reliability (DFR) recommendations to proactively identify high risk bend-line zones to prevent BGA and PCB failures through predictive modeling. This methodology enables board designers to optimize electrical and thermal design and build a mechanically reliable product. IntroductionThe consumer electronics industry is trending towards faster, smaller, and cheaper products with increased product functionality. This has led to an increase in demand for fine pitch BGA components with smaller feature sizes and high

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