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New grid-connected systems have imposed additional requirements regarding reliability, power quality, high levels of power processing capacity, and fault support, where power converters have a crucial role in fulfilling these requirements. Overcoming one of these challenges, this paper proposes a new alternative application to improve the low-voltage ride-through (LVRT) support based on the arm impedance employment of the modular multilevel converter (MMC) by attenuating the fault impacts, avoiding overcurrents and overvoltages. This proposal does not require additional hardware or control loops for LVRT support, only using PI controllers. This paper evaluates symmetrical and asymmetrical grid fault impacts on the converter DC side of four converter topologies: two-level voltage source converter topology (2L-VSC), neutral point clamped (NPC), MMC, and 2L-VSC equipped with a DC-chopper, employing the same control structure for the four topologies, highlighting that the MMC contributed better to LVRT improvement under severe grid conditions.

The advancements in power electronics have supported the widespread penetration of wind energy conversion systems (WECS) in electric grids. In this context, power converters have crucial functionality in the control of active and reactive power injection, moreover they are directly related to voltage and current harmonic distortion levels, mechanical and thermal stress that are experienced by the wind turbine. Currently, several topologies have been tested in order to improve the performance and increase the power processing of WECS to support the network demand. Based on the relevance of this issue, this paper presents a performance comparison of a Double Fed Induction Generator(DFIG)-based WECS employing three topologies of back-toback converters: two-level voltage source converter topology (2L-VSC), neutral point clamped (NPC) and modular multilevel converter (MMC). Simulation results present DFIG currents, voltages, torque, speed and the total harmonic distortion (THD), highlighting the performance improvement employing multilevel topologies and the impacts of using each topology.

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