No abstract

The electroplating of Sn-3.5 wt% Ag bumps without a photoresist (PR) mould on a Si chip was performed to reduce the production steps and cost for 3-D chip stacking. The electroplating characteristics of Sn-Ag and Sn-Ag bump growth were examined. The Sn-Ag bumps were electroplated on the Cuplugged TSVs (through-silicon vias) of a Si chip. The Cu plug in the via was produced using a high-speed Cu filling process by a periodic pulse reverse current waveform. The electroplating current was supplied to the exposed Cu surface in the TSVs to produce the Sn-3.5Ag bumps. As the experimental results show, the Sn-3.5Ag bumps were fabricated successfully without a PR mould, with no serious defects by electroplating. The Ag contents in the Sn-Ag bump decreased with increasing current density. Besides, the bump height and width increased with increasing plating time. The bump width grew isotropically because of the absence of a PR mould. The Sn-3.55 wt% Ag bumps were obtained at a current density of −55 mA/cm 2 for 20 min on the Cu plugs.Index Terms-3-D packaging, electroplating, photoresist mould, Sn-3.5Ag bump, through-silicon via.