A key issue in nanoimprint lithography (NIL) is determining the ultimate pitch resolution achievable for various pattern shapes and their critical dimensional control. To this end, we demonstrated the fabrication of 6 nm half-pitch gratings and 0.04 µm 2 cell area SRAM metal interconnects with 20 nm line half-pitch in resist by NIL. The mould for the 6 nm half-pitch grating was fabricated by cleaving a GaAs/Al 0.7 Ga 0.3 As superlattice grown on GaAs with molecular beam epitaxy, and selectively etching away the Al 0.7 Ga 0.3 As layers in dilute hydrofluoric acid. The mould for the 0.04 µm 2 SRAM metal interconnects was fabricated in silicon dioxide using 35 kV electron beam lithography with polystyrene as a negative resist and a reactive ion etch with the resist as mask. Imprints from both moulds showed excellent fidelity and critical dimension control.
Nanoimprint lithography (NIL) is a paradigm-shift method that has shown sub-10-nm resolution, high throughput, and low cost. To make NIL a next-generation lithography tool to replace conventional lithography, one must demonstrate the needed overlay accuracy in multilayer NIL, large-area uniformity, and low defect density. Here, we present the fabrication of 60-nm channel metal–oxide–semiconductor field-effect transistors on whole 4-in. wafers using NIL at all lithography levels. The nanotransistors exhibit excellent operational characteristics across the wafer. The statistics from consecutive multiwafer processing show an average overlay accuracy of 500 nm over the entire 4-in. wafer. The accuracy is much better when the field size is reduced. The overlay accuracies are limited by the current alignment method and can be improved substantially. The work presents a significant advance in nanoimprint development and its applications in manufacturing of integrated electrical, optical, chemical, and biological nanocircuits.
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