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In this work, we found that employing a post deposition N2O plasma treatment following the deposition of HfO2 film can effectively improve the electrical characteristics of p-type channel metal–oxide–semiconductor field-effect transistors (pMOSFETs) with a HfO2 gate stack in terms of lower gate leakage current, lower interface state density, superior subthreshold swing, higher normalized transconductance and enhanced driving current even though it had led to a slightly higher equivalent oxide thickness (EOT) value of the HfO2 gate stack by around 0.3 nm. In order to clarify the attributes of the improvements, we used charge pumping (CP) measurement to analyze the densities of interface states and bulk traps in the HfO2 gate stacks. The improvements are then ascribed to the higher interface quality offered by the post deposition N2O plasma treatment. Moreover, we found that to more accurately estimate the bulk traps from the CP measurement, the leakage should be taken into account especially at low frequencies. Finally, it was found that the levels of the bulk traps and interface states can be reduced by the N2O plasma treatment, which also helps significantly eliminate the degradation of the gate stack during the subsequent voltage stress.
The effects of postdeposition low-temperature
(∼400°C)
NH3
treatment (LTN treatment) on the characteristics of the
HfO2∕SiO2
gate stack with the TiN gate electrode were studied in this work. After the
HfO2
films were deposited using an AIXTRON Tricent atomic vapor deposition system, the LTN treatment was performed prior to the postdeposition annealing (PDA) step to prevent the growth of an additional interfacial layer, which is known to accompany the traditional high-temperature nitridation technique. The effective electrical oxide thickness for the devices annealed at 700°C PDA, either with or without LTN treatment, was estimated to be about 2.2 and 2.3 nm, respectively, without considering quantum effects. It was found that the LTN treatment effectively improves the characteristics of the
HfO2∕SiO2
stack gates, such as capacitance-voltage
(C-V)
characteristics, frequency dispersion, trap generation rate, and dielectric breakdown voltage even at the high PDA temperature of 700°C.
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