The quantum interference effects of one-dimensional (1D) parallel arrays of high-temperature superconducting (HTS) SQUIDs were investigated experimentally and theoretically via the voltagemagnetic field responses for 4-81 Josephson junctions. The sensitivity of the arrays generally decreased as the number of junctions (and SQUIDs) in parallel increased, contrary to the predictions of models in the low (zero) inductance limit. A full theoretical description was developed to describe 1D parallel HTS SQUID arrays with finite inductances in an applied magnetic field, by extending the model for a single DC SQUID to multiple loops in parallel and including the flux generated by currents circulating through all loops in the array. Calculations were extended from SQUID arrays with equal loop areas to arrays with a distribution of loop areas, otherwise known as superconducting quantum interference filters. The model uses parameters relevant to HTS arrays, including typical variations (up to 30%) in HTS Josephson junction parameters, such as critical current and normal resistance. The effect of the location of the current biasing leads was also explored through the calculations. This model shows good agreement with experimentally measured 1D arrays of different lengths and highlights the importance of the geometry of the current biasing leads to the arrays when optimizing the array response.

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Schottky Barrier (SB)-MOSFET technology offers intriguing possibilities for cryogenic nanoscale devices, such as Si quantum devices and superconducting devices. We present experimental results on a device architecture where the gate electrode is self-aligned with the device channel and overlaps the source and drain electrodes. This facilitates a sub-5 nm gap between the source/drain and channel, and no spacers are required. At cryogenic temperatures, such devices function as p-MOS Tunnel FETs, as determined by the Schottky barrier at the Al-Si interface, and as a further advantage, fabrication processes are compatible with both CMOS and superconducting logic technology.