Despite rapid progress, current deep learning methods face a number of critical challenges. These include high energy consumption, catastrophic forgetting, dependance on global losses, and an inability to reason symbolically. By combining concepts from information theory and vector-symbolic architectures, we propose and implement a novel information processing architecture, the 'Bridge network.' We show this architecture provides unique advantages which can address the problem of global losses and catastrophic forgetting. Furthermore, we argue that it provides a further basis for increasing energy efficiency of execution and the ability to reason symbolically.

Advances in integrated circuitry from the 1950s to the present day have enabled a revolution in technology across the world. However, fundamental limits of circuitry make further improvements through historically successful methods increasingly challenging. It is becoming clear that to address new challenges and applications, new methods of computation will be required. One promising field is neuromorphic engineering, a broad field which applies biologically inspired principles to create alternative computational architectures and methods. We address why neuromorphic engineering is one of the most promising fields within emerging computational technology, elaborating on its common principles and models, and discussing its current state and future challenges.

The recent surge of research on resistive random access memory (ReRAM) devices has resulted in a wealth of different materials and fabrication approaches. In this work, we describe the performance implications of utilizing a reactive ion etch (RIE) based process to fabricate HfO 2 based ReRAM devices, versus a more unconventional shadow mask fabrication approach. The work is the result of an effort to increase device yield and reduce individual device size. Our results show that choice of RIE etch gas (SF 6 versus CF 4 ) is critical for defining the post-etch device profile (cross-section), and for tuning the removal of metal layers used as bottom electrodes in the ReRAM device stack. We have shown that etch conditions leading to a tapered profile for the device stack cause poor electrical performance, likely due to metal re-deposition during etching, and damage to the switching layer. These devices exhibit nonlinear I-V during the low resistive state, but this could be improved to linear behavior once a near-vertical etch profile was achieved. Device stacks with vertical etch profiles also showed an increase in forming voltage, reduced switching variability and increased endurance.

Reinforcement learning (RL) is a foundation of learning in biological systems and provides a framework to address numerous challenges with real-world artificial intelligence applications. Efficient implementations of RL techniques could allow for agents deployed in edge-use cases to gain novel abilities, such as improved navigation, understanding complex situations and critical decision making. Toward this goal, we describe a flexible architecture to carry out RL on neuromorphic platforms. This architecture was implemented using an Intel neuromorphic processor and demonstrated solving a variety of tasks using spiking dynamics. Our study proposes a usable solution for real-world RL applications and demonstrates applicability of the neuromorphic platforms for RL problems.

Resistive Random Access Memory (ReRAM), a form of non-volatile memory, has been proposed as a Flash memory replacement. In addition, novel circuit architectures have been proposed that rely on newly discovered or predicted behavior of ReRAM. One such architecture is the memristive Dynamic Adaptive Neural Network Array, developed to emulate the functionality of a biological neuron system. We demonstrated ReRAM devices that show a synaptic tendency by changing their resistance in an analog fashion. The CMOS compatible nanoscale ReRAM devices shown are based on an HfO 2 switching layer that sits on a tungsten electrode and is covered by a titanium oxygen scavenger layer and a titanium nitride top electrode. In this work, we showed devices exceeding endurance values of 10B cycles with a discrete R off /R on ratio of 15. Multi-level states were achieved by using consecutive ultra-short 5/1.5 ns pulses during the reset operation. A neural network simulation was performed in which the synaptic weights were perturbed with the ReRAM variability, which was extracted from two different characterization methods: (1) via direct write, and (2) via a write/read verification approach during the reset operation. A substantial improvement of the neural network fitness was demonstrated when using the write/read verification approach.