We report the first electronic-property results on atomic-layer deposited Al 2 O 3 /thermal-nitrided SiO 2 stacking dielectric on n-type 4H SiC. The effects of the ultrathin thermal-nitrided SiO 2 ͑2, 4, and 6 nm͒ on the SiC-based metal oxide semiconductor ͑MOS͒ characteristics have also been investigated, compared, and explained. A significant improvement in dielectric reliability and dielectric breakdown field has been observed after an ultrathin nitrided oxide has been introduced between Al 2 O 3 and SiC. The best reported results were obtained from Al 2 O 3 stacked with the thickest nitrided oxide ͑6 nm͒.The quality and reliability of gate oxide on SiC are the determining factors for this electronic material to be successfully employed as the substrate of metal oxide semiconductor ͑MOS͒ based devices for high-temperature, high-power, high-frequency, and/or nonvolatile memory applications. 1 Until now, the quality and reliability of thermally nitrided SiO 2 has been considered as the best reported gate oxide but its SiO 2 -SiC interface and near interface-trap densities are still higher compared with its Si counterpart. [2][3][4][5] The reasons of these are mainly attributed to the accumulation of carbon cluster at the interface and deficiency of oxygen near the interface. 6,7 Efforts searching for the cause of defect states and improving the oxide quality are actively on going. Even if the SiC-SiO 2 interface trap density can be reduced further, at high electric-field ͑E͒ application, the oxide reliability appears to be a major problem. The low-dielectric constant ͑͒ of SiO 2 , compared with SiC, may induce ϳ2.5 times higher E in the oxide. To overcome this problem, highdielectrics ͑AlN, Al 2 O 3 , HfO 2 , La 2 O 3 , etc.͒, as an alternative gate oxide deposited on SiC, have been proposed. [8][9][10][11][12][13][14][15][16][17] Of the numerous reported high-dielectrics on SiC, Al 2 O 3 is the most widely investigated gate dielectric due to its excellent lattice matched with SiC, 18 high value ͑8.3͒, 17 good thermal stability, 12,13 reasonably high conduction band offset ͑1.5 eV between 4H SiC and Al 2 O 3 ͒, 11 and relatively large dielectric bandgap ͑ϳ7 eV͒. 11 It has been reported that types of deposition techniques, postdeposition heat-treatment conditions, and SiC surface treatment are able to influence its MOS characteristics. 11-17 So far, the most reported atomic-layer deposited Al 2 O 3 on either 4H or 6H SiC has demonstrated some encouraging electrical characteristics. However, its leakage current, oxide reliability, build-in effective oxide charge, and flatband voltage shift ͑⌬V FB ͒ are relatively high compared with thermally nitrided SiO 2 . 11-17 The electrical properties of this single layer high-dielectric could be significantly improved by introducing an ultrathin and larger conduction/valence band offset buffer oxide between the high-dielectric and SiC. This has been proven in HfO 2 -SiC system, where a 4-nm thick thermal-nitrided SiO 2 has been used. 9 However, none of this have been reporte...