GaN-based flip-chip light-emitting diodes (FC-LEDs) grown on nanopatterned sapphire substrates (NPSS) are fabricated using self-assembled SiO2 nanospheres as masks during inductively coupled plasma etching. By controlling the pattern spacing, epitaxial GaN can be grown from the top or bottom of patterns to obtain two different GaN/substrate interfaces. The optoelectronic characteristics of FC-LED chips with different GaN/sapphire interfaces are studied. The FC-LED with an antireflective interface layer consisting of a NPSS with GaN in the pattern spacings demonstrates better optical properties than the FC-LED with an interface embedded with air voids. Our study indicates that the two types of FC-LEDs grown on NPSS show higher crystal quality and improved electrical and optical characteristics compared with those of FC-LEDs grown on conventional planar sapphire substrates.

The effect of patterned sapphire substrate (PSS) on the top-surface (P-GaN-surface) and the bottom-surface (sapphire-surface) of the light output power (LOP) of GaN-based LEDs was investigated, in order to study the changes in reflection and transmission of the GaN-sapphire interface. Experimental research and computer simulations were combined to reveal a great enhancement in LOP from either the top or bottom surface of GaN-based LEDs, which are prepared on patterned sapphire substrates (PSS-LEDs). Furthermore, the results were compared to those of the conventional LEDs prepared on the planar sapphire substrates (CSS-LEDs). A detailed theoretical analysis was also presented to further support the explanation for the increase in both the effective reflection and transmission of PSS-GaN interface layers and to explain the causes of increased LOP values. Moreover, the bottom-surface of the PSS-LED chip shows slightly increased light output performance when compared to that of the top-surface. Therefore, the light extraction efficiency (LEE) can be further enhanced by integrating the method of PSS and flip-chip structure design.

High-resistive layers were obtained by periodic growth and in situ annealing of InGaN. The effect of the annealing temperature of InGaN on the indium content and the material sheet resistive was investigated. The indium content decreased as the increase of in situ annealing temperature. Additionally, the material sheet resistance increased with the increase of the in situ annealing temperature for the annealed samples and reached 2 × 1010Ω/sq in the light and 2 × 1011Ω/sq in the dark when the in situ annealing temperature reached 970∘C. The acquirement of high-resistive layers is attributed to the generation of indium vacancy-related defects. Introducing indium vacancy-related defects to compensate background carriers can be an effective method to grow high-resistance material.