The thermoelectric power (TEP) of single walled carbon nanotube (SWCNT) thin films in pure metallic SWCNT (m-SWCNT) and pure semiconducting SWCNT (s-SWCNT) networks as well as in m-and s-SWCNT mixtures is investigated. The TEP measured on the pure s-SWCNT film (≈88 μV/K) was found to be almost 7 times higher than that of the m-SWCNTs (≈13 μV/K). Moreover, a quasilinear increase of TEP of the mixed SWCNT networks was observed as the fraction of s-SWCNTs is increased. The experimentally determined relationship between TEP and the fraction of s-SWCNTs in the mixture allows fast and simple quantitative analysis of the s:m ratio in any as-prepared heterogeneous SWCNT network. Furthermore, a semiempirical model analyzing the effect of the intertube junctions is proposed and applied to describe the thermoelectric behavior of the prepared SWCNT networks. The results of calculations match well with the experimental data and clearly demonstrate that the measured TEP of thin SWCNT films is principally controlled by the intertube junctions. The fundamental role of junctions in generating thermoelectric power is not limited to only SWCNT networks as discovered here, but also could be applied to systems where nanoparticles/nanotube form percolating paths in thin films and composite materials.

Field-effect transistors (FETs) with non-covalently functionalised molybdenum disulfide (MoS2) channels grown by chemical vapour deposition (CVD) on SiO2 are reported. The dangling-bond-free surface of MoS2 was functionalised with a perylene bisimide derivative to allow for the deposition of Al2O3 dielectric. This allowed the fabrication of top-gated, fully encapsulated MoS2 FETs. Furthermore, by the definition of vertical contacts on MoS2, devices, in which the channel area was never exposed to polymers, were fabricated. The MoS2 FETs showed some of the highest mobilities for transistors fabricated on SiO2 with Al2O3 as the top-gate dielectric reported so far. Thus, gate-stack engineering using innovative chemistry is a promising approach for the fabrication of reliable electronic devices based on 2D materials.