Fibre Bragg grating (FBG) sensors have been increasingly adopted to detect the dynamic strain of structures. When the sensor is attached on the surface, adhesive material is employed to assist the installation, which leads to indirect contact of sensing fibre and the monitored structure. To correct the strain transfer error induced by the shear lag effect and improve the measurement accuracy of FBG sensors under dynamic response, strain transfer mechanism of a three-layered testing model constituted of sensing fibre, adhesive layer and host material has been studied in this paper. Laboratory test on steel beam attached with FBG sensor under fatigue load has been projected to investigate the feasibility of the derived strain transfer formula, and numerical simulation by MATLAB has been used as a supporting tool to offer the reference dynamic strain. Based on the analysis, sensitive parameters that affect the strain transfer coefficient have been discussed to instruct the application design of FBG sensors. Results indicate that strain transfer coefficient under dynamic response is much lower than that in static state, and error modification is particularly significant; in the dynamic testing model, bonded length, shear modulus and thickness of adhesive layer are more sensitive, which should be precisely selected in practical engineering to guarantee the effective strain measurement.

Abstract-The push for higher performance analog/RF circuits in scaled CMOS necessitates self-healing via post-manufacturing tuning. A major challenge with self-healing systems is the efficient design of on-chip sensors that capture the performance of interest. This is particularly difficult for metrics such as phase noise that are not easily measured on-chip. We propose an indirect sensing method that exploits the correlations between the performance metrics of interest and those that can be measured using easy-to-integrate sensors. We demonstrate indirect phase noise sensing for a 25GHz self-healing voltage controlled oscillator (VCO) design in 32nm CMOS SOI that approaches the best parametric yield achievable based on simulated results.

DREAMS (DFM Rule EvAluation using Manufactured Silicon) is a comprehensive methodology for evaluating the yield-preserving capabilities of a set of DFM (design for manufacturability) rules using the results of logic diagnosis performed on failed ICs. DREAMS is an improvement over prior art in that the distribution of rule violations over the diagnosis candidates and the entire design are taken into account along with the nature of the failure (e.g., bridge versus open) to appropriately weight the rules. Silicon and simulation results demonstrate the efficacy of the DREAMS methodology. Specifically, virtual data is used to demonstrate that the DFM rule most responsible for failure can be reliably identified even in light of the ambiguity inherent to a nonideal diagnostic resolution, and a corresponding rule-violation distribution that is counter-intuitive. We also show that the combination of physically-aware diagnosis and the nature of the violated DFM rule can be used together to improve rule evaluation even further. Application of DREAMS to the diagnostic results from an in-production chip provides valuable insight in how specific DFM rules improve yield (or not) for a given design manufactured in particular facility. Finally, we also demonstrate that a significant artifact of DREAMS is a dramatic improvement in diagnostic resolution. This means that in addition to identifying the most ineffective DFM rule(s), validation of that outcome via physical failure analysis of failed chips can be eased due to the corresponding improvement in diagnostic resolution.

Abstract⎯On-chip analog self-healing requires low-cost sensors to accurately measure various performance metrics. In this paper, we propose a novel approach of indirect performance sensing based upon Bayesian model fusion (BMF) to facilitate inexpensive-yet-accurate on-chip performance measurement. A 25GHz differential Colpitts voltage-controlled oscillator (VCO) designed in a 32nm CMOS SOI process is used to validate the proposed indirect performance sensing and self-healing methodology. Our silicon measurement results demonstrate that the parametric yield of the VCO is improved from 0% to 69.17% for a wafer after the proposed self-healing is applied.

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