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High-resolution electronic interface circuits for transducers with nonlinear capacitive impedance need an operational amplifier, which is stable for a wide range of load capacitance. Such operational amplifier in a conventional design requires a large area for compensation capacitors, increasing costs and limiting applications. In order to address this problem, we present a gain-boosted two-stage operational amplifier, whose frequency response compensation capacitor size is insensitive to the load capacitance and also orders of magnitude smaller compared to the conventional Miller-compensation capacitor that often dominates chip area. By exploiting pole-zero cancellation between a gain-boosting stage and the main amplifier stage, the compensation capacitor of the proposed operational amplifier becomes less dependent of load capacitance, so that it can also operate with a wide range of load capacitance. A prototype operational amplifier designed in 0.13-μm complementary metal–oxide–semiconductor (CMOS) with a 400-fF compensation capacitor occupies 900-μm2 chip area and achieves 0.022–2.78-MHz unity gain bandwidth and over 65∘ phase margin with a load capacitance of 0.1–15 nF. The prototype amplifier consumes 7.6 μW from a single 1.0-V supply. For a given compensation capacitor size and a chip area, the prototype design demonstrates the best reported performance trade-off on unity gain bandwidth, maximum stable load capacitance, and power consumption.

Selective epitaxial growth of normalGaAs windows (patterns) on SiO2‐normalmasked (100) substrates was achieved by liquid phase electroepitaxy (LPEE). Prior to growth, wells (of the desired depth) were formed in the window areas by selective current‐controlled dissolution. Overgrowth on the SiO2 layer was prevented by arresting epitaxial growth at the SiO2 layer height. Since both selective dissolution and growth rates are proportional to the current density, the depth of the wells and the thickness of the epitaxial layers can be precisely controlled by controlling the current density and process time. Another distinct advantage of the present approach is that, following the formation of the wells, electroepitaxial growth is initiated by simply reversing the polarity of the current passing through the substrate solution interface. Best results regarding the geometry of the wells and uniformity of the epitaxial layers were achieved at relatively low current densities (less than about 15 A/cm2).

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