Direction cosine matrix, Euler angles and quaternions are the common methods for translating vector equations into scalar equations. These methods used in separation simulation lack systematic discussion and comparison. This article is trying to present a proper coordinate transformation method for dynamic analysis of satellite separation. 321 and 123 rotations of Euler angles are proposed to construct the dynamic equations, which is different from simulation of missiles by the rotation of 321 and 231. Both Euler angles and quaternions are adopted to model the separation process of a small satellite that uses the helical compression springs mechanism. Feasibility and practicability of the approach are proved by comparing the simulation results, which are solved in MATLAB and ADAMS software platforms. It is concluded that the method of quaternions is more accurate and efficient in dynamic simulation of satellite separation.

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Camera calibration is the first step of positioning using binocular vision. Owning to the approximation capability of the neural network, a complex mathematical model needed by traditional calibration methods can be avoided. However the general neural network methods have their drawbacks to reduce its accuracy. This paper presents searching algorithm for the best structure and parameters of a neural network using an improved genetic algorithm (GA). The experiments show that this method can be used to establish a mapping between 2D coordinates and 3D coordinates directly and accurately, which is better than traditional calibration and general BP network methods.

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Aiming at the fully differential (FD) sensing and high-precision small-signal output characteristics of micro-electromechanical systems (MEMS) gyroscopes, a low area overhead, high-gain, medium-speed, FD operation amplifier (Op-Amp) is designed for building a small-signal processing delta-Sigma analog-to-digital converter (ADC). The Op-Amp is a two-stage cascade structure, which combines folded cascade (FC) and gain-boosted technology to make the low frequency gain up to 129 dB, to meet the high-precision requirements of 18-bit delta-Sigma ADC. The first stage is FC gain-boosted structure, which uses a small bias current to achieve high-gain and low area overhead. In order to reduce the input noise, process smaller signals, the input pair adopts positive channel Metal–Oxide–Semiconductor (PMOS). The second-stage uses a large bias current to achieve a high unity gain bandwidth (UGB). Under the premise that the tail current source of the first stage is PMOS, in order to reduce the area overhead, abandoning the traditional common source (CS) structure of negative channel Metal–Oxide–Semiconductor (NMOS) input and PMOS as the current mirror load, adopting a new CS structure that PMOS input and NMOS used as independent bias current source. In this structure, the large overdrive voltage significantly reduces the size of transistors and greatly reduces the area overhead. The Op-Amp was implemented in SMIC 0.18 μm BCD process, 5 V supply voltage. Its post-layout simulation achieved a low-frequency gain of 129 dB, a UGB of 35 MHz and a phase margin (PM) of 62° for a load capacitance of 2 pF. Output voltage swings are ±3.71 V and including common mode feedback (CMFB), bias voltage generating circuit and filter capacitor, the area of Op-Amp is 167.162 μm × 200.82 μm. Behavioral-level verification shows that the designed Op-Amp meets the requirements of high-precision delta-Sigma ADCs.