Emerging techniques for integrating optoelectronic (OE) devices, analog interface circuitry, RF circuitry, and digital logic into ultra-mixed signal systems offers approaches toward and demonstrations of integrated optical interconnections in electrical microsystems. As rising data rates dictate the use of optical interconnections and interfaces at increasingly smaller distances, optical interconnections stand at a threshold of opportunity for pervasive implementation if cost-effective integration process technology and performance can be implemented. Heterogeneous integration is one approach toward the integration of compound semiconductor OE devices, Si CMOS circuits, and organic materials. Heterogeneous integration approaches, which utilize dissimilar materials which can be independently grown and optimized, and are subsequently bonded together into an integrated system, are particularly attractive methods for creating high-performance microsystems. This paper describes a variety of optical interconnections integrated into microsystems using thin film heterogeneous integration. Thin film heterogeneous integration is attractive from the standpoint that the topography of the integrated microsystem can remain flat to within a few microns, substrates which are often optically absorbing are removed, both sides of the thin film devices can be processed (e.g., contacted, optically coated), and three-dimensionally stacked structures can be implemented. Demonstrations of interconnections using thin film heterogeneous integration technology include an integrated InGaAs/Si CMOS receiver circuit operating at 1 Gbps, an InGaAs thin film photodetector bonded onto a foundry Si CMOS microprocessor to demonstrate a single chip optically interconnected microprocessor, smart pixel emitter and detector arrays using resonant cavity enhanced P-iN photodetectors bonded on top of per-pixel current controlled oscillators and resonant cavity enhanced light emitting diodes integrated onto digital to analog converter gray-scale per-pixel driver circuitry, and photodetectors embedded in waveguides on electrical interconnection substrates to demonstrate chip-to-chip embedded waveguide interconnections.

Abstract-The combination of resonant tunneling diodes (RTD's)and complementary metal-oxide-semiconductor (CMOS) silicon circuitry can offer substantial improvement in speed, power dissipation, and circuit complexity over CMOSonly circuits. We demonstrate the first integrated resonant tunneling CMOS circuit, a clocked 1-bit comparator with a device count of six, compared with 21 in a comparable all-CMOS design. A hybrid integration process is developed for InP-based RTD's which are transferred and bonded to CMOS chips. The prototype comparator shows sensitivity in excess of 10 6 V/A, and achieves error-free performance in functionality testing. An optimized integration process, under development, can yield high-speed, low power circuits by lowering the high parasitic capacitance associated with the prototype circuit.

This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame rate imaging are compared. The application domain for a fully parallel readout system is identified, and the design for a fully parallel, monolithically integrated smart CMOS focal plane array is presented. This focal plane image processing chip, with an 8 2 8 array of Si CMOS detectors each of which have a dedicated on-chip current input first-order sigma-delta analogto-digital converter front end, has been fabricated, and test results for uniformity and linearity are presented.

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