Smart CMOS focal plane arrays: a Si CMOS detector array and sigma-delta analog-to-digital converter imaging system

Abstract

This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame rate imaging are compared. The application domain for a fully parallel readout system is identified, and the design for a fully parallel, monolithically integrated smart CMOS focal plane array is presented. This focal plane image processing chip, with an 8 2 8 array of Si CMOS detectors each of which have a dedicated on-chip current input first-order sigma-delta analogto-digital converter front end, has been fabricated, and test results for uniformity and linearity are presented.

Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture

“…Area projections of the photodiode and analog-to-digital conversion are based upon the CMOS focal plane array [5]. This 8 × 8 array of Si CMOS detectors, fabricated in 0.8 µm technology, incorporates a current input first-order sigma-delta analog-to-digital converter at each pixel.…”

“…2). A P-N photodiode is used in the CMOS focal plane array [5]. As a first-order approximation, the area of the sampling capacitor represents the analog signal conditioning because it dominates that component.…”

“…Incorporating analog and digital components to process pixels at the detection site creates a challenging design problem [4][5][6]. The goal is not strictly building the system with the highest performance, but delivering the system with the required performance at the lowest cost.…”

New wide-dynamic-range ADC for FPA applications

“…Various image processing circuits can be implemented on the same chip. Analog-to-digital (A/D) converter, which is one of the basic blocks of image system, can be integrated on the sensor chip at the chip level [2], at the column level [3], or at the pixel level [4]- [8]. Analysis by several authors [8]~ [9] shows that pixel level approach gives the best performance.…”

“…Analog-to-digital (A/D) converter, which is one of the basic blocks of image system, can be integrated on the sensor chip at the chip level [2], at the column level [3], or at the pixel level [4]- [8]. Analysis by several authors [8]~ [9] shows that pixel level approach gives the best performance. Since the A/D conversion is performed in the earliest stage of the signal chain and operated at the lowest speed, it gives the highest signal-to-noise ratio (SNR), the lowest power consumption and the fastest frame rate.…”