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We developed a low-temperature growth technique for polycrystalline silicon (poly-Si). When Si is deposited on glass substrates at 450 °C, it crystallizes as thickness increases, but 10-nm-thick layers of Si are mainly amorphous. Use of a ZnS buffer layer with 〈111〉 preferred orientation facilities crystallization of Si during the initial growth stages. The preferred orientation of poly-Si on glass substrates is 〈110〉, while that of poly-Si on the ZnS buffer layer is 〈111〉. This is probably due to local epitaxial growth on polycrystalline ZnS grains with 〈111〉 preferred orientation. Raman spectroscopy showed that the ZnS buffer layer significantly improved the crystallinity of 25-nm-thick Si layers.

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Thin-film electroluminescent (EL) devices having low-threshold-voltages less than 50 volts have been developed utilizing ferroelectric insulating layers. Ferroelectric PbTiO3 and PLT layers having a dielectric constant of 100–200 and a breakdown strength of 0.5–1.5×106 V/cm have been employed as insulating layers. Typical threshold voltages of 60 volts for the PbTiO3 film and 45 volts for the PLT film obtained are approximately four times smaller than that of the conventional EL devices. Typical brightness and power conversion efficiency are measured to be 300 fL at 60 volts and 3×10-3 W/W, respectively. The very slight change in the threshold voltage during an initial ageing process is found to be less than 10 volts, which is about one order of magnitude smaller than that of the conventional EL devices. Technical data on the relation between the device performances and the device structure are presented and discussed.

We have developed a new stylish TFT‐LCD. We located gatedriver monolithic circuits in the pixel area. As there are no electronic circuits in the frame area, we can realize a narrow border and round corners or a multi‐concave shape, and the frame shape can be easily revised.