An efficient modeling technique and a novel CAD tool for the accurate prediction of the performance of integrated inductors and transformers is presented. This generic and process-independent approach generates lumped-element models that easily plug into the RF IC design flow. Their accuracy is established through comparisons with measurements of numerous fabricated inductor structures. This paper intends to provide answers to vital questions in regard to existing limits and future expectations of the performance of on-chip inductors using comprehensive nomographs and quantitative analysis of spiral inductor families. A LNA design paradigm depicts how first-time-working silicon can be achieved when on-chip inductors' coupling is taken into account during the layout design process, minimizing risk, time, and cost.

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In this brief, the design of a 3.1 to 10.6 GHz ultra wideband (UWB) RF front-end (RFFE) is presented. It employs a novel low noise common gate amplifier combined with a noise canceling circuit, that provides wideband input matching, high voltage gain and low noise figure in the whole band of operation. It also adopts a passive single balanced direct conversion mixer with a custom designed balun at its local oscillator (LO) input. The RFFE achieves 20.6 dB of voltage gain and it has adequately flat frequency response. Its noise figure is 3-3.8 dB and the CP1 at the input is −19.7 dBm. The circuit consumes only 10.8 mW from a 1.2 V supply and it was designed in IBM's CMOS 65 nm process.Index Terms-Common gate, direct conversion mixer, noise cancelling, RF front-end (RFFE), ultra wideband (UWB).