The voltage source converter (VSC) is often faced with unbalanced grid conditions that will degrade its performance because of the distorted current with a large amount of harmonics. One of the main parts of current distortion is the third-order harmonics caused by the negative-sequence voltage component at the fundamental frequency. The distorted output of the synchronous reference frame phase-locked loop (SRF-PLL) due to the unbalanced grid voltage is the main reason for the existence of the harmonics. This paper analyzes the mechanism of the generation of harmonics currents and proposes a compensation method for the PLL in VSCs based on the harmonic linearization method without changing the structure of SRF-PLL. The proposed PLL can work properly under unbalanced grid conditions and has a good dynamic response. The third-order current harmonics are reduced significantly by using the proposed PLL instead of the conventional SRF-PLL without changing the current control strategy of VSC. The compensation method is verified by cycle-by-cycle circuit simulations and controller hardware-in-the-loop experiments.

The admittance is a strong tool for stability analysis and assessment of the three-phase voltage source converters (VSCs) especially in grid-connected mode. However, the sequence admittance is hard to calculate when the VSC is operating under unbalanced grid voltage conditions. In this paper, a simple and direct modeling method is proposed for a three-phase VSC taking the unbalanced grid voltage as a new variable for the system. Then coupling in the three-phase system can be calculated by applying the harmonic linearization method. The calculated admittance of three-phase VSCs is verified by detailed circuit simulations.

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