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A technique for sensitizing faults in analog circuits by varying the supply voltage is discussed. Unlike previous work, the technique is applied to the detection of short circuit faults. The validity of the technique is demonstrated with a simple CMOS circuit. The technique is applied to a larger analog circuit and significantly improved fault cover results are obtained.

Abstract.One of the main requirements for generating test patterns for analog and mixed-signal circuits is fast fault simulation. Analog fault simulation is much slower than the digital equivalent. This is due to the fact that digital circuit simulators use less complex algorithms compared with transistor-level simulators. Two of the techniques to speed up analog fault simulation are: fault dropping/collapsing, in which faults that have similar circuit responses compared with the fault-free circuit response and/or with another faulty circuit response are considered equivalent; and behavioral/macro modeling, whereby parts of the circuit are modeled at a more abstract level, therefore reducing the complexity and the simulation time. This paper discusses behavioral fault modeling to speed-up fault simulation for analog circuits.

A new design of built-in current sensor for dynamic supply current testing of analogue integrated circuits is proposed. The sensor has been designed and realized with A M s 0.8 CYE CMOS technology. The sensor occupies 0.01 9 " ' silicon area, which is almost as big as a simple two-stage CMOS opamp. Unlike previously published sensors, this new built-in current sensor is process variation independent.