A yield prediction model with a corresponding cost of the ownership (CoO) and turn-around-time (TAT) analysis is studied on imec’s advanced technology nodes that include EUV and high NA EUV lithography. It also captures device variations from FinFET to CFET. Using modeled die-yield and the cost-of-ownership (CoO) for imec advanced technology nodes including N2, A14, A10, A7 to A5 technology nodes, we show there is a clear correlation trend in choosing a process technology. A precise methodology that can co-model the turn-around-time (TAT) which is inseparable in evaluating the manufacturability is also provided. As a conclusion, node-to-node scalability is proven to be a function of the manufacturability which will be represented to the yield, CoO and TAT metric, not just a function of the patterning complexity or photolithographic resolution that the industry is mainly chasing after.
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