A measurement technique combining Kelvin-Probe Force Microscopy (KPFM) with substrate bias is developed and demonstrated on AlGaN/GaN-on-Si device structures, under conditions relevant to the effect of off-state drain bias stress in transistors. For high substrate bias, the measurements show a significantly lowered surface potential surrounding a small proportion of the dislocations imaged with atomic force microscopy (AFM), laterally extending on a scale of up to a micrometer. Both the density and the size of those features increase with substrate bias, however, conductive AFM measurements under the same bias conditions showed no leakage reaching the surface associated with those features. Our model considers localized conductive paths that end a certain distance below the 2DEG electrically "thinning" the epitaxy and therefore deforming the potential and increasing electric field under off-state stress bias. The conclusion is that the vertical electric field in the buffer is laterally highly non-uniform, with an enhanced vertical field in the vicinity of those dislocations. This non-uniformity redirects substrate bias stress from the buffer to the channel with potential consequences for breakdown.With its excellent material properties, Gallium Nitride (GaN) is highly suitable for power switching and radio frequency
An all-GaN integrated cascode device with an output current of 5 A, threshold voltage of +0.65 V and breakdown voltage of 624 V is demonstrated. Compared to the commercial 600 V hybrid GaN plus Si cascode device (TPH3202), the integrated cascode exhibits a significantly reduced delay time when switched at 200 V and 2.7 A. This is attributed to the absence of a Si MOSFET driver, leading to a much smaller input capacitance as indicated by the high voltage capacitance measurements. In addition, the integrated cascode device shows a reduced ringing effect due to monolithic integration. When compared to commercial 600 V standalone GaN devices (GS66502B and GS-065-004), a reduced Miller effect is observed for the integrated cascode when switched under low gate driving current conditions. The results demonstrate the advantages of the cascode device to switch with low gate driving current using cheaper, faster and more efficient gate drivers.
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