A low power dissipation sigma-delta (ΣΔ) interface for closedloop capacitive accelerometer is presented. In order to reduce the power consumption, the front-end circuit blocks work on a much lower frequency than the electronic ΣΔ modulator, and a cascode inverter with dynamic bias is used as an operational amplifier in electronic ΣΔ modulator, reducing the power dissipation greatly and enhancing the immunity to PVT variations. The measured results indicate that, the total power dissipation is 2.2 mW from a 3.3 V power supply. The noise floor of the accelerometer is 7.2 µg/Hz 1/2 in a closed-loop operation, and the achieved figure of merit (FOM, 8 pW/Hz) is better than the previously reported works.

Power amplifiers are used to amplify signals to the required power and then transmit the signals through antennas. They are the key component of modern wireless communication systems. However, the power amplifier itself has non-linear characteristics and memory effect, especially when the input signal is a broadband signal and high frequency signal, which seriously affects the normal transmission of communication systems. In this paper, the RF power amplifier under test is an amplifier using a BLT53A transistor. We collect the input and output signals of the power amplifier for behavioral modeling. The behavior model only considers the input and output of the amplifier. We adopt a memory polynomial model based on the least squares method. In this paper, we evaluate the correctness of the model from many aspects including AM-AM curve, AM-PM curve, spectrum, gain compression, constellation diagram, and normalized mean square error. The results show that the model is effective.