A constant loop bandwidth fractional-N frequency synthesizer for portable civilian global navigation satellite system (GNSS) receivers implemented in a 130 nm 1P6M CMOS process is introduced. Via discrete working regions, the LC-VCO obtains a wide tuning range with a simple structure and small VCO gain. Spur suppression technology is proposed to minimize the phase offset introduced by PFD and charge pumps. The optimized bandwidth is maintained by an auto loop calibration module to adjust the charge pump current when the PLL output frequency changes or the temperature varies. Measurement results show that this synthesizer attains an in-band phase noise lower than −93 dBc at a 10 kHz offset and a spur less than −70 dBc; the bandwidth varies by ± 3% for all the GNSS signals. The whole synthesizer consumes 4.5 mA current from a 1 V supply, and its area (without the LO tested buffer) is 0.5 mm2.

An LC-VCO with an enhanced quality factor (Q/ varactor for use in a high-sensitivity GNSS receiver is presented. An enhanced A-MOS varactor is composed of two accumulation-mode MOS (A-MOS) varactors and two bias voltages, which show the improved Q and linearization capacitance-voltage (C -V / curve. The VCO gain (K VCO / is compensated by a digital switched varactors array (DSVA) over entire sub-bands. Based on the characteristics of an A-MOS, the varactor in a DSVA is a high Q fixed capacitor as it is switched off, and a moderate Q tuning varactor when it is switched on, which keeps the maximal Q for the LC-tank. The proposed circuit is fabricated in a 0.18 m 1P6M CMOS process. The measured phase noise is better than -122 dBc/Hz at a 1 MHz offset while the measured tuning range is 58.2% and the variation of K VCO is close to ˙21% over the whole of the sub-bands and the effective range of the control voltage. The proposed VCO dissipates less than 5.4 mW over the whole operating range from a 1.8 V supply.