No abstract

Flexible piezoelectric tactile sensor with transverse planar electrodes based on hydrothermally grown ZnO nanorods (ZnO NRs) was presented by using polydimethylsiloxane (PDMS) as flexible substrate and packaging material. The effects of the content of gold nanoparticles (AuNPs) added into the precursor solution on the structural morphology of ZnO NRs and on the piezoelectric properties of the ZnO NRs tactile sensor were investigated. Tactile sensors show a linear piezoelectric response in the pressure range of 0-1 N, and the sensor for the precursor solution with AuNPs of 100 μL shows a high sensitivity of 1.42 V/N due to the large aspect ratio of the ZnO NRs, indicating that a small amount of AuNPs addition can optimize the structural morphology of ZnO NRs and thus improve the piezoelectric response of the sensor. Meanwhile, the sensor is employed to monitor human information in real-time such as bending/stretching motion of finger and distinguish various objects.

ZnO thin-film transistors (ZnO TFTs) with high-k NbLaO as a gate dielectric were fabricated on an indium tin oxide (ITO)-coated glass substrate. The NbLaO film was prepared by the sputtering method at room temperature and then annealed in N2 at 200, 300, and 400 °C. The effect of annealing temperature on the quality of NbLaO and ZnO films, especially on the electrical properties and the bias-stress stability of the ZnO TFT, was investigated. The AFM images reveal that the NbLaO film annealed at 300 °C exhibits a relatively smooth surface morphology with a root mean square roughness of 0.31 nm. AFM and x-ray diffraction measurements confirmed that the grain size of ZnO thin films slightly decreases with the increase of the annealing temperature. Except the mobility of slightly less than that of the device annealed 200 °C, the other electrical properties (off-state current, on/off current ratio, and subthreshold slope) of the ZnO TFT annealed at 300 °C are better than those of the samples annealed at 200 and 400 °C and show excellent gate-bias stress stability, which is due to a combination effect of a smoother interface, a denser structure, and the absence of indium doping in the NbLaO gate dielectric, thus resulting in a lower interfacial trap density.