We present a bidirectional two-terminal switching device using a Schottky barrier for spin-transfer-torque magnetic random access memory (STT-MRAM), which is composed of a Schottky barrier contact with a metal/semiconductor/metal (M/S/M) structure. The proposed M/S/M switching device provides a bidirectional current flow sufficient to write STT-MRAM using a punch through with an extended depletion region at a junction under a reverse bias of M/S or S/M. In addition, a high on–off ratio of 105 is confirmed under the read condition, which is acceptable for the operation of STT-MRAM. From this work, it is expected that an M/S/M structure with bilateral Schottky junctions will be a promising switch device for STT MRAM beyond 20 nm.

A novel sensing algorithm for non-volatile Spin-Transfer Torque Magneto-resistive Random Access Memory (STT-MRAM) is presented. The dynamic reference sense amplifier (DRSA) improves sensing margin to achieve high reliability and sensitivity by increasing the difference of input voltages of sense amplifier. A dynamic reference sensing algorithm is proposed as a solution for the read margin loss due to variation in magnetic tunneling junction (MTJ) parameters of the STT-MRAM. The proposed sensing method was designed in standard 0.18 um process parameters, and simulation results indicate simultaneously increased the read margin compared with the conventional sensing method.

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A novel design for temperature-compensated CMOS voltage reference sources by using the 1st order voltage reference taking into account the property of the conventional current generator is proposed to minimize the temperature coefficient because the 2nd order voltage reference obtained by the compensated nonlinearity of the base-emitters in complementary to absolute temperature has inherent complex problems due to the large scale circuits. A temperature coefficient of the proposed voltage reference source is estimated by using the current generator, which operates at smaller or larger temperature in comparison with the optimized operating temperature. The proposed temperature-compensated CMOS voltage reference sources are simulated by using a ppm/ o C in a temperature range between -40 and 125 o C. The simulated results indicate that the proposed temperaturecompensated CMOS voltage reference sources by using the 1st order voltage reference taking into account the property of the conventional current generator can be used to decrease the temperature coefficient.