Various new technologies have been applied for developing vaccines against various animal diseases. Virus-like particle (VLP) vaccine technology was used for manufacturing the porcine circovirus type 2 and RNA particle vaccines based on an alphavirus vector for porcine epidemic diarrhea (PED). Although VLP is classified as a killed-virus vaccine, because its structure is similar to the original virus, it can induce long-term and cell-mediated immunity. The RNA particle vaccine used a Venezuela equine encephalitis (VEE) virus gene as a vector. The VEE virus partial gene can be substituted with the PED virus spike gene. Recombinant vaccines can be produced by substitution of the target gene in the VEE vector. Both of these new vaccine technologies made it possible to control the infectious disease efficiently in a relatively short time.

Network security systems such as firewall and intrusion prevention system (IPS) have packet classification rule to allow or protect the network traffic. In addition, they are forced to provide multi-gigabit speed in order to deploy the current Internet backbone which requires gigabit Ethernet (GbE), 10 GbE, etc. In order to support highperformance packet classification in the network security system, a Ternary Content Addressable Memory, i.e., TCAM accelerates flow identification with classification rules. The TCAM, however, matches the first rule among multiple matched rules, so the ordering of TCAM entries is strictly kept while rules are added or deleted. To keep the ordering in a TCAM, some existing TCAM entries should move to other empty space which impacts the data path processing in the network security system. In this paper, we have proposed a rule update algorithm which reduces the number of TCAM entry movement by the partial ordering of TCAM entry groups instead of the sequential ordering. Our simulation results justify the significant decrement of movement operations where we have applied both generated random rules and real IPS rules, i.e., Snort rules.

In this paper, we introduce the architecture of Multiprotocol Label switching (MPLS) k b e l Edge Router (LER) system based on ACE2000 ATM switching system.We implemented the MPLS LER system by adding MPLS service controller arid MPLS interfkce tnodiile ( M I M ) with 2.5 Gbps throughput to ACE2000 ATM switching system. We also describe the implementation of the MIM that can support sliips-in-tlie-riigi~t mode such as ATM service arid Internet service in MPLS LER system. We designed the MIM to hnve a high peformance IP router function cis well us ATM processing ,functions. It consists of physical layer processing part, IP forwarding engine arid VC merging part, ATM l a y r processing part, arid switch interface part. The most iniportunt part of this module is IP forwarding engine, because it has a major @ect on the pet$wmunce of MPLS LER system. We propose a high petforniance IP forwurditig engine that cut1 support QoS-based multi-services such as ATM service, MPLS VPN service, eniiilated leased line (ELL) service, real-time ( R T ) service U S well as best-effort service. I t provides a high-speed IP lookiip by hurdwarebused pipeliried and parullel lookup control scheme ancl CAM-bused IP search engine. It provides 622Mbps wirerate forwarding performatice arid 14 Mpps lookup p e fortnutice.

In this paper, we describe the necessity of VC merging in edge label switched router (LSR) for scalability, one of the important merits in multi-protocol label switching (MPLS). We introduce the design of a high-speed IP forwarding engine with virtual connection (VC) merging. This forwarding engine largely consists of segmentation and reassembly (SAR) processing part, CAM-based IP look-up processing part, VCmerging part, and physical line interface part. It provides some desirable characteristics that are to be shown in this paper. And we also describe comparison of edge MPLS systems with centralized and distributed forwarding engine architecture, and the good points of MPLS system with the latter architecture supporting VC merging.

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