For the repair of phase-shifter (PS) defects with good topology and without optical deterioration, a new repair technique has been developed by using focused-ion-beam (FIB) etch-back and laser-explosion processes. This technique mainly consists of three steps: (1) leveling of defects by FIB-assisted chemical vapor deposition (CVD) or filling with spin-coated SOG film, (2) etch-back or/and exposure by Ga-FIB scanning with the detection of total secondary ions which inform the end point of etch-back, and (3) elimination of Ga-implanted shifter (or quartz) layer by a Nd:YAG laser shot. The excess shifter (bump defect) was rubbed out by adjusting the milling rate of the FIB-CVD film and its confined defects. For the missing shifter (divot defect), the filling SOG was screened off within the defect by use of Ga-FIB milling (exposure) and development. The Ga-implanted layer was eliminated by the laser explosion and so the repaired area was recovered in transmittance from less than 50% up to 98%.

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Load of photomask manufacturing for the most advanced semiconductor devices is increasing due to the complexity of mask layouts caused by highly accurate RET or OPC, tight specification for 2D/3D mask structures, and requirements of quick deliveries. The mask cost becomes a concern of mask users especially in SoC businesses because the number of masks required throughout the wafer process is almost the same for each product regardless of the variety in production volume when a unified platform is applied to the designs. Shares of mask cost within total production cost cannot be ignored especially in small volume SoC products.DFM (design for manufacturing) is inevitable in a mask level as well as in a wafer level to solve the cost problem. "Mask-DFM" is a method to decrease the burden of mask manufacturing and to improve the yield and quality of masks, not only by modification of mask pattern layouts (design) but also all other things including utilization of designer's intents.We have developed our Mask-DFM system called "MiLE", that calculates mask-manufacturing workload through layout analyses combining information of mask configuration, and visualizes the consequence of Mask-DFM efforts. "MiLE (Mask manufacturIng Load Estimation)" calculates a relative index which represents the mask manufacturing workload determined by factors of 1) EB writing, 2) defect inspection/repair, 3) materials and processes and 4) specification. All the factors are computed before tape-outs for mask making in the system by the following methods. To estimate EB writing time, we applied high-throughput simulator and counted the number of "shot", minimum figure unit in EB writing, by using post-OPC layout data.Mask layout that caused troubles and extra load in mask inspection or repair was specified from MRC (mask rule checking) of the same post-OPC data. Additional layout analysis perceives designer's intents that are described in the layout data and these are reflected in the calculation of the "MiLE" index. Finally, chip arrangement on a mask is retrieved from so-called electronic mask spec sheets to construct mask layouts. "MiLE" notifies to designers the index of mask manufacturing workload that is caused by mask layout, while modification and adjustments of design or OPC are iterated to maximize device productivity in early design phases. Therefore, designers can judge and control the mask manufacturability, or mask cost by designs and additional intents useful for mask making. In the production phases, our system releases useful information for mask manufacturing to a mask shop and decreases the mask manufacturing workload. In this paper, we report the outline and functions of MiLE system and the results of mask manufacturing workload calculation using post-OPC layout data.

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