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Laterally graded SiGe-on-insulator is the key-structure for next-generation Si-technology, which enables advanced device-arrays with various energy-band-gaps as well as 2-dimensional integration of functional-materials with various lattice-constants. Segregation kinetics in rapid-melting growth of SiGe stripes are investigated in wide ranges of stripe-lengths (10–500 μm) and cooling-rates (10–19 °C/s). Universal laterally graded SiGe-profiles obeying Scheil-equation are obtained for all samples with low cooling-rate (10 °C/s), which enables robust designing of lateral-SiGe-profiles. For samples with high cooling-rates and long stripe-lengths, anomalous two-step-falling profiles are obtained. Dynamical analysis considering the growth-rate-effects enables comprehensive understanding of such phenomena. This provides the unique tool to achieve modulated lateral-SiGe-profiles beyond Scheil equation.

Laterally and vertically modulated SiGe-on-insulator (SGOI) structures are essential to integrate functional device-arrays with various energy-band-gaps and/or lattice-constants. We develop the temperature-modulated successive rapid-melting-growth (RMG) method, where Si-concentration dependent RMG processing is combined with non-destructive crystallinity-analysis. First, SGOI is formed by segregation-controlled RMG of SiGe by using Si-substrate as crystalline-seed. Polarized-Raman-scattering measurements non-destructively reveal the lateral-epitaxial-growth of SGOI with graded SiGe-concentration profiles. Second, Ge-on-insulator (GOI) is stacked on SGOI by using SGOI as crystalline-seed, where RMG temperature is selected between the melting-points of Ge and underlying SGOI. This achieves defect-free, multiply-stacked GOI on graded-SGOI structure, which demonstrates 3-dimensionally modulated SiGe-concentration profiles on Si-platform.

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