Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to further improve the channel hot electron stress (CHES) and constant voltage stress (CVS) reliability of n-channel metal-oxide-semiconductor field-effect-transistor with HfO2/SiON gate stack. Although the improvement of transconductance, drain current and subthreshold swing due to the fluorine passivation is screened out by the effect of uniaxial tensile strain, the result clearly demonstrates that integrating the CFI process in the SiN CESL-strained device can further suppress the CHES- and CVS-induced threshold voltage shift.
Due to the reduced gate coupling ratio, the channel Fowler-Nordheim (CFN) programming speed of stacked-gate flash memories with high-permittivity (k) tunnel dielectrics (TDs) is helpless in operation voltage reduction. Although the electric field on high-k tunnel dielectrics is lower than SiO2 tunnel oxide, enhanced impact ionization rate and lower barrier height contribute to higher channel hot-electron (CHE) injection current and efficiency. Consequently, high-k TDs are only effective for the memories programmed with hot electron injection rather than FN tunneling, which is suitable for the NOR-type stacked-gate flash memories.
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