The fifth generation (5G) of wireless communication systems is considered the key technology to enable a wide range of application scenarios and the effective spreading of the smart city concept. Vertical business use cases, specifically designed for the future 5G city, will have a strong economical and social impact. For this reason, ongoing 5G field trials have to test newly deployed technologies as well as the capability of 5G to create a new digital economy. This paper describes the 5G field trial environment that was launched in Italy at the end of 2017. The aim is to evaluate the capability of the 5G network of supporting innovative services with reference to suitably designed key performance indicators and to evaluate the opportunities offered by these services. Indeed, vertical business use cases, specifically designed for the future 5G city, with a strong economic and social impact, are under implementation and will be evaluated. In particular, the paper provides a detailed description of the deployment of an actual complete integrated 5G network. It shows how 5G is effective enabling technology for a wide range of vertical business and use cases. Indeed, its flexibility allows to satisfy completely different performance requirements of real services. Some preliminary results, obtained during the first phase, are presented for a smart mobility scenario.

No abstract

No abstract

No abstract

In this paper, the SiC planar MOSFET with built-in reverse MOS-channel diode (SiC MCD-MOSFET) is investigated utilizing TCAD simulation tools. When the device is working as a freewheeling diode, the operation of the parasitic body diode is suppressed effectively due to the lower threshold voltage of the MCD. Therefore, the bipolar degradation issue can be completely solved. In addition, the SiC MCD-MOSFET is featuring superior dynamic characteristics. The input capacitance (CISS), reverse transfer capacitance (C RSS), gate charge (Q G) and gate-to-drain charge (Q GD) are reduced by a factor of ~2, ~7, ~2 and ~10, respectively, as compared to the conventional SiC MOSFET (SiC C-MOSFET). Combined with the slightly increased on-resistance (R ON), tremendously enhanced figures of merit (R ON ×Q G and R ON ×Q GD are decreased by a factor of 1.8 and 9, respectively) are obtained in the SiC MCD-MOSFET. The outstanding performance and easy-to-implement feature make the SiC MCD-MOSFET more attractive for further power electronic applications. Index Terms SiC planar MOSFETs, bipolar degradation, dynamic performance.