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This paper presents a fast methodology for the investigation of trapping and hot-electron effects in GaN-based highelectron mobility transistors (HEMTs). The presented method is based on pulsed ID–VG measurements and electroluminescence characterization and provides a rapid and effective evaluation of the following: 1) the presence of traps in the region under the gate; 2) trapping phenomena occurring in the gate–drain access region; 3) the role of traps in limiting the maximum gate–drain electric field and the equivalent electron temperature. The method is validated by means of a split-wafer experiment carried out on GaN-based HEMTs with different gatematerials with and without passivation

Traps in InAlN/GaN and AlGaN/GaN high electron mobility transistors (HEMTs) are identified and compared using constant drain-current deep level transient spectroscopy (CID-DLTS). For both structures with different barrier materials, the same drain-access electron trap at EC−0.57 eV dominates the drain-controlled CID-DLTS trap spectrum. This suggests that the physical source of this trap, previously associated with drain-lag, is not present in the barrier but instead is likely to reside in the GaN-buffer. Gate-controlled CID-DLS measurements, which are preferentially sensitive to the barrier under the gate, reveal different trap spectra for the two HEMTs, showing that choice of barrier materials can influence under-gate trap signatures.

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