EUV lithography resolves features below 11 nm. However, photonic and atomic variations at these photon energies and dimensions lead to less than 1:109 potential stochastic defects causing device failures in stable manufacturing processes. This study investigates a methodology intended to identify root causes of stochastic defects with potential mitigation paths. Simulation techniques using pseudo random numbers are used to identify failing photonic and chemical event or distribution combinations. Failing combinations occurring in many photon-chemical configurations are thought to have potential mitigation methodologies. Photonic effects demonstrated significant impacts on stochastic defect formation with approximately 73% of the photon seeds resulting in a failure in at least 60% of the trials. The material results were mixed with large failure quantities that demonstrated low impacts. The photonic shot noise based failures were dominating in this study and these failures will not be mitigated by material enhancement alone.
The first high-NA EUVL scanner will have an 0.55 NA and will use anamorphic magnification. Therefore, the standard 10×13 cm lithography mask will be imaged into a 2.6×1.65 cm rectangle on the wafer due to the increased reduction factor of the lens’ vertical direction. Layers exposed on high-NA anamorphic scanners will require two stitched halffields to achieve the equivalent exposure area of previous-generation scanners. Stitching strategies will depend on the product type being manufactured. For chips with a large die area, it will be necessary to stitch fields across the die. For smaller chips, it may be advantageous to use three stitched exposures depending on the die size. In any case, the stray light from neighboring fields and black border proximity effects cause challenges for robust manufacturing. Some recent studies have shown that the CD may vary significantly as a function of the proximity to the black border edge due to multilayer stresses. In addition, stitching through a die has increased optical proximity effects which will need to be corrected to achieve the desired wafer CD. In this paper we examine the effects relevant to designing a stitched process, quantify manufacturing tolerances, and show how these effects can be corrected with EDA. More specifically, we examine the optical and mechanical properties of the multi-layer black border etch and optimization of sub-resolution gratings to reduce reflectivity with phase shifting absorber materials. Ultimately, we will show that for a well designed stitch, the effects of stitching can be corrected without impact to process window.
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