Computation offloading is a promising way to improve the performance as well as reducing the battery power consumption of a smartphone application by executing some parts of the application on a remote server. Supporting such capability is not easy for smartphone application developers due to (1) correctness: some code, e.g., that for GPS, gravity, and other sensors, can run only on the smartphone so that developers have to identify which parts of the application cannot be offloaded; (2) effectiveness: the reduced execution time must be greater than the network delay caused by computation offloading so that developers need to calculate which parts are worth offloading; (3) adaptability: smartphone applications often face changes of user requirements and runtime environments so that developers need to implement the adaptation on offloading. More importantly, considering the large number of today's smartphone applications, solutions applicable for legacy applications will be much more valuable. In this paper, we present a tool, named DPartner, that automatically refactors Android applications to be the ones with computation offloading capability. For a given Android application, DPartner first analyzes its bytecode for discovering the parts worth offloading, then rewrites the bytecode to implement a special program structure supporting ondemand offloading, and finally generates two artifacts to be deployed onto an Android phone and the server, respectively.

In the multi-core era, it is critical to efficiently test multithreaded software and expose concurrency bugs before software release. Previous work has made significant progress in detecting and validating concurrency bugs under a given input. Unfortunately, software testing always faces large sets of test inputs, and existing techniques are still too expensive to be applied to every test input in practice.In this paper, we use open-source software to study how existing concurrency-bug detection tools work for a set of inputs. The study shows that an interleaving pattern, such as a data race or an atomicity violation, can often be exposed by many inputs. Consequently, existing bug detectors would inevitably waste their bug detection effort to generate duplicate bug reports, when applied to a set of inputs.Guided by the above study, we propose a coverage metric, Concurrent Function Pairs (CFP), to efficiently approximate how interleavings overlap across inputs. Using CFP, we have designed a new approach to detecting data races and atomicity-violation bugs for a set of inputs.Our evaluation on open-source C/C++ applications shows that our CFP-guided approach can effectively accelerate concurrency-bug detection for a set of inputs by reducing redundant detection effort across inputs.

Puccinia xanthii Schwein. f. sp. ambrosiae-trifidae S.W.T. Batra is an obligate parasitic rust fungus of Ambrosia trifida Linn. Field investigations in Liaoning Province, China, showed that it is an effective biocontrol agent of this alien invasive weed. Its infection of the plant was observed by light microscopy combined with Coomassie Brilliant Blue R-250 staining. We report the infection process, including teliospore germination and basidiospore formation on the host leaf surface, penetration of host tissue, and development of fungal hyphae within the host tissue. Fresh teliospores began to germinate from the germ pore within 1 h under suitable conditions and soon produced basidiospores or secondary basidiospores. Basidiospores falling on host leaves germinated from the end of the basidiospore opposite to the apiculus. Appressoria of germ tubes tended to orient along leaf epidermis cell ridges or at junctions near stomata rather than fixing randomly on the leaf surface. These germ tubes grew for short or longer distances before forming appressoria. The rust fungus directly penetrated the host epidermis by infectious pegs rather than through stomata. Within host tissues, the rust fungus formed intraepidermal vesicles, primary hyphae, intracellular hyphae, and M-haustoria. The intricate infectious structures formed by P. xanthii f. sp. ambrosiae-trifidae on or in host tissues suggest that the rust fungus is a suitable organism for researching the interaction between the pathogen and host plant.Résumé : Le Puccinia xanthii Schwein. f. sp. ambrosiae-trifidae S. W. T. Batra est une rouille fongique parasite obligatoire de l'Ambrosia trifida Linn. Des recherches conduites sur le terrain dans la province de Lianong en Chine montrent qu'il constitue un agent de maitrise biologique efficace contre cette plante adventice nuisible. Ils ont observé le processus d'infection de la plante en combinant microscopie photonique avec la méthode de coloration au bleu brillant de Coomassie R-250. Ils présentent le processus d'infection, incluant la germination des téliospores et la formation des basidiospores sur la surface des feuilles, la pénétration des tissus de l'hôte, et le développement des hyphes fongiques dans les tissus de l'hôte. La télios-pore fraiche commence à germer à partir du pore germinatif en moins de 1h, sous des conditions favorables, et produit rapidement des basidiospores ou des basidispores secondaires. Les basisdiospores tombant sur les feuilles de l'hôte germent par l'extrémité de la basidiospore opposée à l'apicule. Les appressoriums du tube germinatif tendent à s'orienter le long des rainures entre les cellules épidermiques de la feuille, ou à leurs jonctions près des stomates, plutôt que de se fixer au hasard sur la surface foliaire. Ces tubes germinatifs poussent sur des distances plus ou moins longues avant de former leur appressoriums. Le champignon de la rouille pénètre directement l'épiderme foliaire par des pointes d'infection plutôt que par les ostioles des stomates. Dans les tissus de l'hôte, le...

Instruction prefetching is an effective technique to reduce the instruction cache miss latency for improving the average-case performance. For real-time systems, however, the use of instruction prefetching will only besuitable if a reasonably tight worst-case performance of programs using instruction prefetching can be predicted. This paper presents an approach to modeling and computing the worst-case instruction cache performance with prefetching. Our experimental results indicate that instruction prefetching can benefit both the average-case and worst-case performance; however, the degree of the worst-case performance improvement due to instruction prefetching is less than that of the average-case performance, thus leading to increased time variation for real-time computing. Also, we find that the prefetching distance can significantly impact the worst-case performance analysis with instruction prefetching. Particularly, when the prefetching distance is equal to the L1 miss penalty, the worst-case execution time with instruction prefetching is minimized (i.e., optimal).