Network adapter is one of the most important components of NOC which is recommended to be used in present and future SOCs. In this paper, a network adapter compatible with OCP interface protocol is designed to enable the integration of IP cores from different providers into an on-chip interconnection network. In order to tradeoff communication performance with complication, the design of network adapter is based on a single global address space and supports burst transmission and virtual channel technology. With the goal of reducing transport latency, the processes of encapsulation and decapsulation are executing simultaneously with packet transmitting and receiving. Considering the simulation result, the network adapter presented in this paper gets satisfactory performance.
This paper presents a transaction-level on-chip communication network model, including routers and links, which can be easily employed in a system-level system-onchip simulation framework for early functional verification and architecture analysis. The model is capable ofproviding NoC's latency and throughput information during simulating process and developed in SystemC to achieve high simulation speed'.
Abstract. In this paper, we design and implement general parameterized IP (Intellectual Property) cores of convolutional encoder with SMIC 0.35µm CMOS technology, serial structure and parallel structure respectively. And analyze each of the power dissipation using Synopsys PTPX tool. The result shows the parallel circuit structure saves 14 percent power dissipation compared to that of serial circuit structure, with the same encode radio. Meanwhile, computing speed of parallel structure with 8-bit parallelism is 8 times than that of serial structure under the same clock frequency. Certainly, serial circuit structure has their particular characters such as easily realized and less resource consumption.
The control system of laser engraving machine based on ARM processor realize the precise control of the two-dimensional stepping motor and the laser head. This article focuses on the proposed stepping motor speed and trajectory control algorithm, and meanwhile, the speed control adopt linear acceleration and deceleration control algorithm; Trajectory control, based on the traditional point by point comparison arc interpolation method, puts forward the improved algorithm which can effectively improve the interpolation speed and interpolation accuracy. The experimental results show that the method can improve the machining precision and machining efficiency of laser engraving machine, and also can realize the high precision carving.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.
customersupport@researchsolutions.com
10624 S. Eastern Ave., Ste. A-614
Henderson, NV 89052, USA
This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.
Copyright © 2025 scite LLC. All rights reserved.
Made with 💙 for researchers
Part of the Research Solutions Family.