In coupled magnetic resonance (CMR) wireless energy transfer systems, the energy transfer power is low and the power transfer efficiency changes with the coil position. One reason for this reduction in power and efficiency is the impedance mismatching (IM) between the Tx and Rx coils; achieving impedance matching for multiple-input multiple-output (MIMO) CMR IM wireless power transmission (WPT) is quite complex due to the uncertainty in the number of coils and the interaction between coils. In this paper, we provide an analytical model of MIMO CMR which fully formulates the complex relationship between multiple Tx and Rx channels. Then, we design an impedance matching network (IMN) for MIMO CMR and derive an optimal IM solution. Base on this solution, we also develop an adaptive impedance matching scheme to control IMN, based on an automatic analysis of MIMO CMR system; the resulting control scheme achieves optimal values for transmission power and efficiency through IMN and coil selection. The simulation results indicate that the scheme is able to automatically adjust the impedance matching network according to the changes of the relative positions between Tx and Rx coils to achieve high energy transfer power and efficiency.

Passive wireless sensor network (PWSN) requires high positioning for network management. The harvested energy of the passive sensor is modulated as the ranging data and the position is derived accordingly. Thus, the wireless power transfer (WPT) is a dominant factor for such localization. With the help of intelligent reconfigurable surface (IRS), the WPT efficiency can be significantly improved. In this paper, we propose the Fisher information matrix (FIM) and the Cramér–Rao lower bound (CRLB) analyzing model of the PWSN localization. We prove the impacts of phase modulation of IRS on the localization performance. Based on our analysis, we develop an approximation algorithm and a genetic algorithm to control the IRS phases. Then, the localization accuracy of PWSN can be further improved. The simulation results demonstrate that the phase modulation based on GA can achieve high accurate localization for PWSN using IRS.

This paper presents a transistor-level verification flow to detect electrical overstress, static leakage and ESD-CDM issues in large low power SoC circuits. With innovative features like Spice patterns recognition and static voltage propagation by Calibre® PERC™, this approach brings significant added value to standard digital checkers that cannot capture some parts of the design in essence, such as analog IPs or third-party IPs designed outside power-intent driven flows. The results obtained on a 32nm CMOS circuit using multiple separate supplies with body biasing strategy, demonstrate the ability of this solution to cope with complex design architectures. As a matter of fact, some severe issues like hundreds of missing level shifters and weak input stages inside isolation cells were detected in few hours.

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Multi-power domains have become a common practice in modern VLSI designs. As the number of different operational modes and different power schemes increases, the problem of unintentional forward-biased diodes, which cause power loss and chip malfunction, has become a critical issue. In this paper, we present a novel static analysis solution to detect unintentional forward biased diodes during full-chip verification, using a device-level vector-less approach. The key feature of our method is a hierarchical Multi-Stage Filtering algorithm, which drastically reduces the runtime. Our method has been extensively tested and verified in production flows.