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This paper reports a novel concept of a low voltage low power temperature sensor with a 300–370 K operating temperature range, based on a silicon-on-insulator (SOI) nanowire FET with standard SOI CMOS technology. The novel design combines a top-down silicon nanowire and an electrostatically formed nanowire, capacitively coupled to a back-gate electrode. A surface charged silicon nitride layer is used to deplete the upper part of the nanowire, while a back-gate controls the size and location of the electrostatically formed nanowire. The device operates in a regime similar to the subthreshold regime of a nanowire transistor and features a very high temperature response, expressed by the temperature coefficient of current (TCC  =  6 % K−1 at 0.4  <  IDS  <  5 pA for a single nanowire). The device can be easily integrated into a nanowire-based sensor array.

This paper presents a novel micro-bolometer structure based on SOI gate all around Electrostatically Formed Nanowire (GAA EFN) transistors. The new design enables formation of the EFN conductive channels in the volume of the SOI devices layers, far from the top and bottom silicon/oxide interfaces, thus reducing the noise level and increasing the temperature sensitivity to 13.3%/K. Detailed electrical and thermal simulations show that the micro-bolometer structure has an effective responsivity of 1.95 × 103 A/W, noise equivalent power of 561 fW, noise equivalent temperature difference of 8 mK, and a thermal time constant of 35 msec, when operated in depletion all around mode (DAA) at the sub-threshold regime.

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